On Mon, Jul 23, 2012 at 04:30:20PM -0700, Andrew Morton wrote: > On Fri, 20 Jul 2012 15:50:16 +0300 > "Kirill A. Shutemov" <kirill.shutemov@xxxxxxxxxxxxxxx> wrote: > > > Clearing a 2MB huge page will typically blow away several levels of CPU > > caches. To avoid this only cache clear the 4K area around the fault > > address and use a cache avoiding clears for the rest of the 2MB area. > > > > It would be nice to test the patchset with more workloads. Especially if > > you see performance regression with THP. > > > > Any feedback is appreciated. > > This all looks pretty sane to me. Some detail-poking from the x86 guys > would be nice. > > What do other architectures need to do? Simply implement > clear_page_nocache()? And define ARCH_HAS_USER_NOCACHE to 1. > I believe that powerpc is one, not sure about > others. Please update the changelogs to let arch maintainers know > what they should do and cc those people on future versions? Okay. -- Kirill A. Shutemov
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