On Sun, Apr 07, 2024 at 04:41:02AM +0000, Liu, Yujie wrote: > Hi Paul, > > On Thu, 2024-04-04 at 10:44 -0700, Paul E. McKenney wrote: > > On Thu, Apr 04, 2024 at 05:13:20AM +0800, kernel test robot wrote: > > > tree: > > > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > > > master > > > head: 727900b675b749c40ba1f6669c7ae5eb7eb8e837 > > > commit: df35ee400e06b23ecd44fdb66451a5343932f834 [2524/3504] riscv: > > > Emulate one-byte and two-byte cmpxchg > > > config: riscv-nommu_virt_defconfig > > > (https://download.01.org/0day-ci/archive/20240404/202404040526.GVza > > > L2io-lkp@xxxxxxxxx/config) > > > compiler: clang version 19.0.0git > > > (https://github.com/llvm/llvm-project 546dc2245ffc4cccd0b05b58b7a59 > > > 55e355a3b27) > > > reproduce (this is a W=1 build): > > > (https://download.01.org/0day-ci/archive/20240404/202404040526.GVza > > > L2io-lkp@xxxxxxxxx/reproduce) > > > > > > If you fix the issue in a separate patch/commit (i.e. not just a > > > new version of > > > the same patch/commit), kindly add following tags > > > > Reported-by: kernel test robot <lkp@xxxxxxxxx> > > > > Closes: > > > > https://lore.kernel.org/oe-kbuild-all/202404040526.GVzaL2io-lkp@xxxxxxxxx/ > > > > I believe that this is fixed by the following updated commit in -rcu: > > > > 27011e7159ef ("riscv: Emulate one-byte cmpxchg") > > > > But please let me know if I am missing something. > > Sorry for the delay of reply due to we were on public holidays in the > last few days. > > The error still exists on the updated commit. > > Commit 27011e7159ef added the uintptr_t cast for __old and __new only > in the first occurrence of __ret assignment, but missed that in the > remaining __ret assignments. Seems it needs another fixup as below: > > ------------------------------------------------------------------- > > diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h > index abcd5543b861b..a9803825567cf 100644 > --- a/arch/riscv/include/asm/cmpxchg.h > +++ b/arch/riscv/include/asm/cmpxchg.h > @@ -219,7 +219,7 @@ > register unsigned int __rc; \ > switch (size) { \ > case 1: \ > - __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \ > + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ > break; \ > case 4: \ > __asm__ __volatile__ ( \ > @@ -268,7 +268,7 @@ > register unsigned int __rc; \ > switch (size) { \ > case 1: \ > - __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \ > + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ > break; \ > case 4: \ > __asm__ __volatile__ ( \ > @@ -317,7 +317,7 @@ > register unsigned int __rc; \ > switch (size) { \ > case 1: \ > - __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \ > + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ > break; \ > case 4: \ > __asm__ __volatile__ ( \ > Applied with attribution, thank you! Quite the variety of casts required by the various architectures. ;-) Please see below for the updated patch. Thanx, Paul ------------------------------------------------------------------------ commit 4d5c72a34948625caf85c00b1db85372f4edbcae Author: Paul E. McKenney <paulmck@xxxxxxxxxx> Date: Wed Mar 27 17:13:02 2024 -0700 riscv: Emulate one-byte cmpxchg Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on riscv. [ paulmck: Apply kernel test robot feedback, additional casts from Liu, Yujie. ] [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ] Signed-off-by: Paul E. McKenney <paulmck@xxxxxxxxxx> Tested-by: Yujie Liu <yujie.liu@xxxxxxxxx> Cc: Andi Shyti <andi.shyti@xxxxxxxxxxxxxxx> Cc: Andrzej Hajda <andrzej.hajda@xxxxxxxxx> Cc: Arnd Bergmann <arnd@xxxxxxxx> Cc: <linux-riscv@xxxxxxxxxxxxxxxxxxx> Acked-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index be09c8836d56b..3bab9c5c0f465 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -44,6 +44,7 @@ config RISCV select ARCH_HAS_UBSAN select ARCH_HAS_VDSO_DATA select ARCH_KEEP_MEMBLOCK if ACPI + select ARCH_NEED_CMPXCHG_1_EMU select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT select ARCH_STACKWALK diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h index 2fee65cc84432..a9803825567cf 100644 --- a/arch/riscv/include/asm/cmpxchg.h +++ b/arch/riscv/include/asm/cmpxchg.h @@ -9,6 +9,7 @@ #include <linux/bug.h> #include <asm/fence.h> +#include <linux/cmpxchg-emu.h> #define __xchg_relaxed(ptr, new, size) \ ({ \ @@ -170,6 +171,9 @@ __typeof__(*(ptr)) __ret; \ register unsigned int __rc; \ switch (size) { \ + case 1: \ + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ __asm__ __volatile__ ( \ "0: lr.w %0, %2\n" \ @@ -214,6 +218,9 @@ __typeof__(*(ptr)) __ret; \ register unsigned int __rc; \ switch (size) { \ + case 1: \ + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ __asm__ __volatile__ ( \ "0: lr.w %0, %2\n" \ @@ -260,6 +267,9 @@ __typeof__(*(ptr)) __ret; \ register unsigned int __rc; \ switch (size) { \ + case 1: \ + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ __asm__ __volatile__ ( \ RISCV_RELEASE_BARRIER \ @@ -306,6 +316,9 @@ __typeof__(*(ptr)) __ret; \ register unsigned int __rc; \ switch (size) { \ + case 1: \ + __ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \ + break; \ case 4: \ __asm__ __volatile__ ( \ "0: lr.w %0, %2\n" \
