On 3/11/24 15:17, Andy Lutomirski wrote: > I *think* that all x86 implementations won't fill the TLB for a > non-accessed page without also setting the accessed bit, That's my understanding as well. The SDM is a little more obtuse about it: > Whenever the processor uses a paging-structure entry as part of > linear-address translation, it sets the accessed flag in that entry > (if it is not already set). but it's there. But if we start needing Accessed=1 to be accurate, clearing those PTEs gets more expensive because it needs to be atomic to lock out the page walker. It basically needs to start getting treated similarly to what is done for Dirty=1 on userspace PTEs. Not the end of the world, of course, but one more source of overhead.
