On 3/7/24 13:08, Yosry Ahmed wrote: > CPU 1 CPU 2 > /* user thread running */ > context_switch() /* to kthread */ > /* user thread enables LAM */ > context_switch() > context_switch() /* to user thread */ > > In this case, there are no races, but the second context switch on CPU 1 > may not write CR3 (if TLB is up-to-date), in which case we will run the > user thread with CR3 having the wrong LAM mask. This could cause bigger > problems, right? Yes, but this is precisely the kind of thing that we should solve with mm generations. Its sole purpose is to thwart optimization where the mm_prev==mm_next and might not rewrite CR3.
