On 3/7/24 05:39, Yosry Ahmed wrote: > - /* > - * Read the tlb_gen to check whether a flush is needed. > - * If the TLB is up to date, just use it. > - * The barrier synchronizes with the tlb_gen increment in > - * the TLB shootdown code. > - */ > - smp_mb(); > - next_tlb_gen = atomic64_read(&next->context.tlb_gen); > - if (this_cpu_read(cpu_tlbstate.ctxs[prev_asid].tlb_gen) == > - next_tlb_gen) > + if (!need_flush && !need_lam_update) > return; Instead of all this new complexity, why not just inc_mm_tlb_gen() at the site where LAM is enabled? That should signal to any CPU thread that its TLB is out of date and it needs to do a full CR3 reload. Also, have you been able to actually catch this scenario in practice? Considering how fun this code path is, a little effort at an actual reproduction would be really appreciated.
