On Thu, 28 Jun 2012 00:13:19 +0200
Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> wrote:
> On Wed, 2012-06-27 at 23:15 +0200, Peter Zijlstra wrote:
> >
> > S390 doesn't need a TLB flush after ptep_get_and_clear_full() and
> > before __tlb_remove_page() because its ptep_get_and_clear*() family
> > already does a full TLB invalidate. Therefore force it to use
> > tlb_fast_mode.
>
> On that.. ptep_get_and_clear() says:
>
> /*
> * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
> * both clear the TLB for the unmapped pte. The reason is that
> * ptep_get_and_clear is used in common code (e.g. change_pte_range)
> * to modify an active pte. The sequence is
> * 1) ptep_get_and_clear
> * 2) set_pte_at
> * 3) flush_tlb_range
> * On s390 the tlb needs to get flushed with the modification of the pte
> * if the pte is active. The only way how this can be implemented is to
> * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
> * is a nop.
> */
>
> I think there is another way, arch_{enter,leave}_lazy_mmu_mode() seems
> to wrap these sites so you can do as SPARC64 and PPC do and batch
> through there.
>
> That should save a number of TLB invalidates..
Unfortunately that is not good enough. The point is that a pte that can
be referenced by another cpu may not be modified without using one of
the special instructions that flushes the TLBs on all cpu at the same
time. It really is one pte at a time if more than one cpu attached a
particular mm.
--
blue skies,
Martin.
"Reality continues to ruin my life." - Calvin.
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