tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 2863b714f3ad0a9686f2de1b779228ad8c7a8052 commit: e8d2fac59ea8f3dca39aef74c40f487f3b56713b [13537/13783] parisc: Runtime unalignment testcase config: parisc-randconfig-r121-20240118 (https://download.01.org/0day-ci/archive/20240118/202401182236.k7vm9ww7-lkp@xxxxxxxxx/config) compiler: hppa-linux-gcc (GCC) 13.2.0 reproduce: (https://download.01.org/0day-ci/archive/20240118/202401182236.k7vm9ww7-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202401182236.k7vm9ww7-lkp@xxxxxxxxx/ sparse warnings: (new ones prefixed by >>) >> arch/parisc/kernel/smp.c:369:17: sparse: sparse: cast truncates bits from constant value (aabbccdd11223344 becomes 11223344) >> arch/parisc/kernel/smp.c:370:17: sparse: sparse: cast truncates bits from constant value (a0b0c0d01020304 becomes 1020304) vim +369 arch/parisc/kernel/smp.c 351 352 /* wait until last booting CPU has started. */ 353 while (cpu_now_booting) 354 ; 355 356 /* Let _start know what logical CPU we're booting 357 ** (offset into init_tasks[],cpu_data[]) 358 */ 359 cpu_now_booting = cpuid; 360 361 /* 362 ** boot strap code needs to know the task address since 363 ** it also contains the process stack. 364 */ 365 smp_init_current_idle_task = idle ; 366 mb(); 367 368 printk(KERN_INFO "Releasing cpu %d now, hpa=%lx vector %x\n", cpuid, p->hpa, PAGE0->vec_rendz); > 369 t2[0] = 0xaabbccdd11223344; > 370 t2[1] = 0x0a0b0c0d01020304; 371 asm("nop ! nop ! nop" : : : "memory"); 372 asm volatile("ldw 1(%1),%0" : "=r" (i) : "r"(&t2) : "memory"); 373 printk("VAL1 %04x\n", i); 374 asm volatile("ldw 2(%1),%0" : "=r" (i) : "r"(&t2) : "memory"); 375 printk("VAL2 %04x\n", i); 376 asm volatile("ldw 3(%1),%0" : "=r" (i) : "r"(&t2) : "memory"); 377 printk("VAL3 %04x\n", i); 378 asm volatile("ldw 4(%1),%0" : "=r" (i) : "r"(&t2) : "memory"); 379 printk("VAL4 %04x\n", i); 380 // asm("b,n ." : : : "memory"); 381 382 /* 383 ** This gets PDC to release the CPU from a very tight loop. 384 ** 385 ** From the PA-RISC 2.0 Firmware Architecture Reference Specification: 386 ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which 387 ** is executed after receiving the rendezvous signal (an interrupt to 388 ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the 389 ** contents of memory are valid." 390 */ 391 gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa); 392 mb(); 393 394 /* 395 * OK, wait a bit for that CPU to finish staggering about. 396 * Slave will set a bit when it reaches smp_cpu_init(). 397 * Once the "monarch CPU" sees the bit change, it can move on. 398 */ 399 for (timeout = 0; timeout < 10000; timeout++) { 400 if(cpu_online(cpuid)) { 401 /* Which implies Slave has started up */ 402 cpu_now_booting = 0; 403 goto alive ; 404 } 405 udelay(100); 406 barrier(); 407 } 408 printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); 409 return -1; 410 411 alive: 412 /* Remember the Slave data */ 413 smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n", 414 cpuid, timeout * 100); 415 return 0; 416 } 417 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
