On Tue, Dec 19, 2023 at 9:01 PM Kinsey Ho <kinseyho@xxxxxxxxxx> wrote: > > This series is the result of the following discussion: > https://lore.kernel.org/47066176-bd93-55dd-c2fa-002299d9e034@xxxxxxxxxxxxx/ > > It mainly avoids building the code that walks page tables on CPUs that > use it, i.e., those don't support hardware accessed bit. Specifically, > it introduces a new Kconfig to guard some of functions added by > commit bd74fdaea146 ("mm: multi-gen LRU: support page table walks") > on CPUs like POWER9, on which the series was tested. > > > Kinsey Ho (4): > mm/mglru: add CONFIG_ARCH_HAS_HW_PTE_YOUNG > mm/mglru: add CONFIG_LRU_GEN_WALKS_MMU > mm/mglru: remove CONFIG_MEMCG > mm/mglru: remove CONFIG_TRANSPARENT_HUGEPAGE > > arch/Kconfig | 8 + > arch/arm64/Kconfig | 1 + > arch/x86/Kconfig | 1 + > arch/x86/include/asm/pgtable.h | 6 - > include/linux/memcontrol.h | 2 +- > include/linux/mm_types.h | 16 +- > include/linux/mmzone.h | 28 +--- > include/linux/pgtable.h | 2 +- > kernel/fork.c | 2 +- > mm/Kconfig | 4 + > mm/vmscan.c | 271 ++++++++++++++++++--------------- > 11 files changed, 174 insertions(+), 167 deletions(-) +Donet Tom <donettom@xxxxxxxxxxxxxxxxxx> who is also working on this. Donet, could try this latest version instead? If it works well as the old one you've been using, can you please provide your Tested-by tag? Thanks.
