Re: [v4 0/3] Reduce TLB flushes under some specific conditions

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On 11/8/23 20:59, Byungchul Park wrote:
> Can you believe it? I saw the number of TLB full flush reduced about
> 80% and iTLB miss reduced about 50%, and the time wise performance
> always shows at least 1% stable improvement with the workload I tested
> with, XSBench. However, I believe that it would help more with other
> ones or any real ones. It'd be appreciated to let me know if I'm missing
> something.

I see that you've moved a substantial amount of code out of arch/x86.
That's great.

But there doesn't appear to be any improvement in the justification or
performance data.  The page flag is also here, which is horribly frowned
upon.  It's an absolute no-go with this level of justification.

I'd really suggest not sending any more of these out until those issues
are rectified.  I know I definitely won't be reviewing them in this state.




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