On Tue, 05 Sep 2023 03:20:17 PDT (-0700), prabhakar.csengg@xxxxxxxxx wrote:
On Fri, Sep 1, 2023 at 10:58 PM kernel test robot <lkp@xxxxxxxxx> wrote:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: a47fc304d2b678db1a5d760a7d644dac9b067752
commit: f2863f30d1b05e5ecf61c063609cb974954d47f8 [13230/13643] riscv: errata: Add Andes alternative ports
config: riscv-randconfig-r015-20230902 (https://download.01.org/0day-ci/archive/20230902/202309020548.rbrIJu6S-lkp@xxxxxxxxx/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230902/202309020548.rbrIJu6S-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202309020548.rbrIJu6S-lkp@xxxxxxxxx/
All warnings (new ones prefixed by >>):
arch/riscv/errata/andes/errata.c:29:16: error: variable has incomplete type 'struct sbiret'
29 | struct sbiret ret;
| ^
arch/riscv/errata/andes/errata.c:29:9: note: forward declaration of 'struct sbiret'
29 | struct sbiret ret;
| ^
arch/riscv/errata/andes/errata.c:35:8: error: call to undeclared function 'sbi_ecall'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
35 | ret = sbi_ecall(ANDESTECH_SBI_EXT_ANDES, ANDES_SBI_EXT_IOCP_SW_WORKAROUND,
| ^
>> arch/riscv/errata/andes/errata.c:46:14: warning: result of comparison of constant 9223372036854811205 with expression of type 'unsigned long' is always true [-Wtautological-constant-out-of-range-compare]
46 | if (arch_id != ANDESTECH_AX45MP_MARCHID || impid != ANDESTECH_AX45MP_MIMPID)
| ~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~
1 warning and 2 errors generated.
After applying the below four patches we shouldn't be seeing this
randconfig warnings:
https://patchwork.kernel.org/project/linux-riscv/patch/20230901105111.311200-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
https://patchwork.kernel.org/project/linux-riscv/patch/20230901105858.311745-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
https://patchwork.kernel.org/project/linux-riscv/patch/20230901110320.312674-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
https://patchwork.kernel.org/project/linux-riscv/patch/20230901110936.313171-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
Thanks, these are in the testing queue. I'll pick them up for the merge
window unless something goes off the rails.
+Geert, who acked the SOC one.
Cheers,
Prabhakar
vim +46 arch/riscv/errata/andes/errata.c
40
41 static bool errata_probe_iocp(unsigned int stage, unsigned long arch_id, unsigned long impid)
42 {
43 if (!IS_ENABLED(CONFIG_ERRATA_ANDES_CMO))
44 return false;
45
> 46 if (arch_id != ANDESTECH_AX45MP_MARCHID || impid != ANDESTECH_AX45MP_MIMPID)
47 return false;
48
49 if (!ax45mp_iocp_sw_workaround())
50 return false;
51
52 /* Set this just to make core cbo code happy */
53 riscv_cbom_block_size = 1;
54 riscv_noncoherent_supported();
55
56 return true;
57 }
58
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