tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-4.19.y head: 94bffc1044d871e2ec89b2621e9a384355832988 commit: 9ee0e501f8041151d3917b0c752ed783945cbf78 [593/9999] slub: improve bit diffusion for freelist ptr obfuscation config: riscv-randconfig-r024-20230724 (https://download.01.org/0day-ci/archive/20230724/202307241458.eJAjP2ul-lkp@xxxxxxxxx/config) compiler: riscv64-linux-gcc (GCC) 12.3.0 reproduce: (https://download.01.org/0day-ci/archive/20230724/202307241458.eJAjP2ul-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202307241458.eJAjP2ul-lkp@xxxxxxxxx/ All errors (new ones prefixed by >>): arch/riscv/include/asm/irqflags.h: Assembler messages: arch/riscv/include/asm/irqflags.h:30: Error: unrecognized opcode `csrs sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:36: Error: unrecognized opcode `csrc sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s3,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s3', extension `zicsr' required arch/riscv/include/asm/irqflags.h:36: Error: unrecognized opcode `csrc sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s4,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s4', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s7,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s7', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s1,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s3,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s3', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s7,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s7', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s8,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s8', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a1,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required >> arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc t4,sstatus,2', extension `zicsr' required >> arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,t4', extension `zicsr' required >> arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,t4', extension `zicsr' required >> arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,t4', extension `zicsr' required arch/riscv/include/asm/irqflags.h:36: Error: unrecognized opcode `csrc sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:30: Error: unrecognized opcode `csrs sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:30: Error: unrecognized opcode `csrs sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s8,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s8', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a1,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a1', extension `zicsr' required arch/riscv/include/asm/irqflags.h:24: Error: unrecognized opcode `csrr a5,sstatus', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc a2,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:42: Error: unrecognized opcode `csrrc s8,sstatus,2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,s8', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required arch/riscv/include/asm/irqflags.h:60: Error: unrecognized opcode `csrs sstatus,a2', extension `zicsr' required vim +42 arch/riscv/include/asm/irqflags.h 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 38 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 39 /* get status and disable interrupts */ 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 40 static inline unsigned long arch_local_irq_save(void) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 41 { 1125203c13b9da3 Christoph Hellwig 2018-01-04 @42 return csr_read_clear(sstatus, SR_SIE); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 43 } 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 44 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 45 /* test flags */ 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 46 static inline int arch_irqs_disabled_flags(unsigned long flags) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 47 { 1125203c13b9da3 Christoph Hellwig 2018-01-04 48 return !(flags & SR_SIE); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 49 } 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 50 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 51 /* test hardware interrupt enable bit */ 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 52 static inline int arch_irqs_disabled(void) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 53 { 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 54 return arch_irqs_disabled_flags(arch_local_save_flags()); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 55 } 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 56 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 57 /* set interrupt enabled status */ 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 58 static inline void arch_local_irq_restore(unsigned long flags) 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 59 { 1125203c13b9da3 Christoph Hellwig 2018-01-04 @60 csr_set(sstatus, flags & SR_SIE); 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 61 } 6d60b6ee0c9777b Palmer Dabbelt 2017-07-10 62 :::::: The code at line 42 was first introduced by commit :::::: 1125203c13b9da32125e171b4bd75e93d4918ddd riscv: rename SR_* constants to match the spec :::::: TO: Christoph Hellwig <hch@xxxxxx> :::::: CC: Palmer Dabbelt <palmer@xxxxxxxxxxx> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
