tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: e3342532ecd39bbd9c2ab5b9001cec1589bc37e9 commit: 45810d486bb44bd60213d5f09a713df81b987972 [10810/11447] phy: mediatek: add support for phy-mtk-hdmi-mt8195 config: loongarch-randconfig-r016-20230410 (https://download.01.org/0day-ci/archive/20230414/202304140732.NZcq7RdC-lkp@xxxxxxxxx/config) compiler: loongarch64-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=45810d486bb44bd60213d5f09a713df81b987972 git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout 45810d486bb44bd60213d5f09a713df81b987972 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Link: https://lore.kernel.org/oe-kbuild-all/202304140732.NZcq7RdC-lkp@xxxxxxxxx/ All errors (new ones prefixed by >>): loongarch64-linux-ld: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.o: in function `mtk_hdmi_pll_calc': >> drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:240: undefined reference to `__floatundidf' >> loongarch64-linux-ld: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:240: undefined reference to `__ltdf2' >> loongarch64-linux-ld: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:242: undefined reference to `__gedf2' loongarch64-linux-ld: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:242: undefined reference to `__ltdf2' loongarch64-linux-ld: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:244: undefined reference to `__gedf2' pahole: .tmp_vmlinux.btf: Invalid argument .btf.vmlinux.bin.o: file not recognized: file format not recognized vim +240 drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c 208 209 static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw, 210 unsigned long rate, unsigned long parent_rate) 211 { 212 u8 digital_div, txprediv, txposdiv, fbkdiv_high, posdiv1, posdiv2; 213 u64 tmds_clk, pixel_clk, da_hdmitx21_ref_ck, ns_hdmipll_ck, pcw; 214 u8 txpredivs[4] = { 2, 4, 6, 12 }; 215 u32 fbkdiv_low; 216 int i, ret; 217 218 pixel_clk = rate; 219 tmds_clk = pixel_clk; 220 221 if (tmds_clk < 25 * MEGA || tmds_clk > 594 * MEGA) 222 return -EINVAL; 223 224 if (tmds_clk >= 340 * MEGA) 225 hdmi_phy->tmds_over_340M = true; 226 else 227 hdmi_phy->tmds_over_340M = false; 228 229 /* in Hz */ 230 da_hdmitx21_ref_ck = 26 * MEGA; 231 232 /* TXPOSDIV stage treatment: 233 * 0M < TMDS clk < 54M /8 234 * 54M <= TMDS clk < 148.35M /4 235 * 148.35M <=TMDS clk < 296.7M /2 236 * 296.7 <=TMDS clk <= 594M /1 237 */ 238 if (tmds_clk < 54 * MEGA) 239 txposdiv = 8; > 240 else if (tmds_clk >= 54 * MEGA && tmds_clk < 148.35 * MEGA) 241 txposdiv = 4; > 242 else if (tmds_clk >= 148.35 * MEGA && tmds_clk < 296.7 * MEGA) 243 txposdiv = 2; 244 else if (tmds_clk >= 296.7 * MEGA && tmds_clk <= 594 * MEGA) 245 txposdiv = 1; 246 else 247 return -EINVAL; 248 249 /* calculate txprediv: can be 2, 4, 6, 12 250 * ICO clk = 5*TMDS_CLK*TXPOSDIV*TXPREDIV 251 * ICO clk constraint: 5G =< ICO clk <= 12G 252 */ 253 for (i = 0; i < ARRAY_SIZE(txpredivs); i++) { 254 ns_hdmipll_ck = 5 * tmds_clk * txposdiv * txpredivs[i]; 255 if (ns_hdmipll_ck >= 5 * GIGA && 256 ns_hdmipll_ck <= 1 * GIGA) 257 break; 258 } 259 if (i == (ARRAY_SIZE(txpredivs) - 1) && 260 (ns_hdmipll_ck < 5 * GIGA || ns_hdmipll_ck > 12 * GIGA)) { 261 return -EINVAL; 262 } 263 if (i == ARRAY_SIZE(txpredivs)) 264 return -EINVAL; 265 266 txprediv = txpredivs[i]; 267 268 /* PCW calculation: FBKDIV 269 * formula: pcw=(frequency_out*2^pcw_bit) / frequency_in / FBKDIV_HS3; 270 * RG_HDMITXPLL_FBKDIV[32:0]: 271 * [32,24] 9bit integer, [23,0]:24bit fraction 272 */ 273 pcw = div_u64(((u64)ns_hdmipll_ck) << PCW_DECIMAL_WIDTH, 274 da_hdmitx21_ref_ck / PLL_FBKDIV_HS3); 275 276 if (pcw > GENMASK_ULL(32, 0)) 277 return -EINVAL; 278 279 fbkdiv_high = FIELD_GET(GENMASK_ULL(63, 32), pcw); 280 fbkdiv_low = FIELD_GET(GENMASK(31, 0), pcw); 281 282 /* posdiv1: 283 * posdiv1 stage treatment according to color_depth: 284 * 24bit -> posdiv1 /10, 30bit -> posdiv1 /12.5, 285 * 36bit -> posdiv1 /15, 48bit -> posdiv1 /10 286 */ 287 posdiv1 = 10; 288 posdiv2 = 1; 289 290 /* Digital clk divider, max /32 */ 291 digital_div = div_u64((u64)ns_hdmipll_ck, posdiv1 / posdiv2 / pixel_clk); 292 if (!(digital_div <= 32 && digital_div >= 1)) 293 return -EINVAL; 294 295 mtk_hdmi_pll_set_hw(hw, PLL_PREDIV, fbkdiv_high, fbkdiv_low, 296 PLL_FBKDIV_HS3, posdiv1, posdiv2, txprediv, 297 txposdiv, digital_div); 298 if (ret) 299 return -EINVAL; 300 301 return 0; 302 } 303 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests
