On Fri, Dec 02, 2022 at 04:35:31PM -0800, Rick Edgecombe wrote:
> From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
>
> Setting CR4.CET is a prerequisite for utilizing any CET features, most of
> which also require setting MSRs.
...
> arch/x86/kernel/cpu/common.c | 37 ++++++++++++++++++++++++++++++------
> 1 file changed, 31 insertions(+), 6 deletions(-)
Looks better.
Let's get rid of the ifdeffery and simplify it even more. Diff ontop:
---
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 579f10222432..c364f3067121 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -597,12 +597,14 @@ __noendbr void ibt_restore(u64 save)
#endif
-#ifdef CONFIG_X86_CET
static __always_inline void setup_cet(struct cpuinfo_x86 *c)
{
- bool kernel_ibt = HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT);
- bool user_shstk;
- u64 msr = 0;
+ bool kernel_ibt, user_shstk;
+
+ if (!IS_ENABLED(CONFIG_X86_CET))
+ return;
+
+ kernel_ibt = HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT);
/*
* Enable user shadow stack only if the Linux defined user shadow stack
@@ -618,21 +620,18 @@ static __always_inline void setup_cet(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_USER_SHSTK);
if (kernel_ibt)
- msr = CET_ENDBR_EN;
+ wrmsrl(MSR_IA32_S_CET, CET_ENDBR_EN);
+ else
+ wrmsrl(MSR_IA32_S_CET, 0);
- wrmsrl(MSR_IA32_S_CET, msr);
cr4_set_bits(X86_CR4_CET);
if (kernel_ibt && !ibt_selftest()) {
pr_err("IBT selftest: Failed!\n");
wrmsrl(MSR_IA32_S_CET, 0);
setup_clear_cpu_cap(X86_FEATURE_IBT);
- return;
}
}
-#else /* CONFIG_X86_CET */
-static inline void setup_cet(struct cpuinfo_x86 *c) {}
-#endif
__noendbr void cet_disable(void)
{
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
