On Fri, Dec 02, 2022 at 04:35:35PM -0800, Rick Edgecombe wrote: > From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx> > > New processors that support Shadow Stack regard Write=0,Dirty=1 PTEs as > shadow stack pages. > > In normal cases, it can be helpful to create Write=1 PTEs as also Dirty=1 > if HW dirty tracking is not needed, because if the Dirty bit is not already > set the CPU has to set Dirty=1 when it the memory gets written to. This > creates addiontal work for the CPU. So tradional wisdom was to simply set > the Dirty bit whenever you didn't care about it. However, it was never > really very helpful for read only kernel memory. > > When CR4.CET=1 and IA32_S_CET.SH_STK_EN=1, some instructions can write to > such supervisor memory. The kernel does not set IA32_S_CET.SH_STK_EN, so > avoiding kernel Write=0,Dirty=1 memory is not strictly needed for any > functional reason. But having Write=0,Dirty=1 kernel memory doesn't have > any functional benefit either, so to reduce ambiguity between shadow stack > and regular Write=0 pages, removed Dirty=1 from any kernel Write=0 PTEs. > > Tested-by: Pengfei Xu <pengfei.xu@xxxxxxxxx> > Tested-by: John Allen <john.allen@xxxxxxx> > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx> Reviewed-by: Kees Cook <keescook@xxxxxxxxxxxx> -- Kees Cook
