On 10/28/2022 11:16 AM, Huang, Ying wrote: > If my understanding were correct, you think the latency / bandwidth of > these NUMA nodes will near each other, but may be different. > > Even if the latency / bandwidth of these NUMA nodes isn't exactly same, > we should deal with that in memory types instead of memory tiers. > There's only one abstract distance for each memory type. > > So, I still believe we will not have many memory tiers with my proposal. > > I don't care too much about the exact number, but want to discuss some > general design choice, > > a) Avoid to group multiple memory types into one memory tier by default > at most times. Do you expect the abstract distances of two different types to be close enough in real life (like you showed in your example with CXL - 5000 and PMEM - 5100) that they will get assigned into same tier most times? Are you foreseeing that abstract distance that get mapped by sources like HMAT would run into this issue? Regards, Bharata.
