On Mon, Oct 10, 2022 at 09:33:29AM +0800, Vernon Yang wrote: > When some RISC-V compilers do not support the Zicbom extension, > the build system auto disable the CONFIG_RISCV_ISA_ZICBOM, so the > source code of the relevant function is not compiled, resulting > in the definition of the riscv_cbom_block_size variable cannot > be found > > So add conditional compilation to fix it > > Reported-by: kernel test robot <lkp@xxxxxxxxx> > Signed-off-by: Vernon Yang <vernon2gm@xxxxxxxxx> > --- > arch/riscv/kvm/vcpu.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c > index a032c4f0d600..08a6c3cb695d 100644 > --- a/arch/riscv/kvm/vcpu.c > +++ b/arch/riscv/kvm/vcpu.c > @@ -256,7 +256,7 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, > unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | > KVM_REG_SIZE_MASK | > KVM_REG_RISCV_CONFIG); > - unsigned long reg_val; > + unsigned long reg_val = 0; > > if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) > return -EINVAL; > @@ -268,7 +268,9 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, > case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): > if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) > return -EINVAL; > +#ifdef CONFIG_RISCV_ISA_ZICBOM > reg_val = riscv_cbom_block_size; > +#endif > break; Thanks Vernon, I sent a fixup to Anup last week for this, which is similar to your patch, but #ifdef's out the entire case. Thanks, drew > default: > return -EINVAL; > -- > 2.25.1 >
