tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: d5538ab91d3a9a237805be6f8c6c272af2987995 commit: 6fd09c9afa49b343d17cecedd7879d097f37f2a9 [1206/7639] ARM: Kconfig: clean up platform selection config: arm-randconfig-c003-20220916 (https://download.01.org/0day-ci/archive/20220917/202209170126.OGPr2Nd1-lkp@xxxxxxxxx/config) compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=6fd09c9afa49b343d17cecedd7879d097f37f2a9 git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout 6fd09c9afa49b343d17cecedd7879d097f37f2a9 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@xxxxxxxxx> All errors (new ones prefixed by >>): In file included from include/linux/irqchip/arm-gic-v3.h:604, from drivers/pci/controller/pcie-iproc.c:17: arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_EOIR1_EL1': >> arch/arm/include/asm/arch_gicv3.h:44:9: error: implicit declaration of function 'write_sysreg' [-Werror=implicit-function-declaration] 44 | write_sysreg(val, a32); \ | ^~~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:51:1: note: in expansion of macro 'CPUIF_MAP' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:18:41: error: implicit declaration of function '__ACCESS_CP15' [-Werror=implicit-function-declaration] 18 | #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) | ^~~~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:51:11: note: in expansion of macro 'ICC_EOIR1' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:18:55: error: 'c12' undeclared (first use in this function) 18 | #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:51:11: note: in expansion of macro 'ICC_EOIR1' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:18:55: note: each undeclared identifier is reported only once for each function it appears in 18 | #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:51:11: note: in expansion of macro 'ICC_EOIR1' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_EOIR1_EL1': >> arch/arm/include/asm/arch_gicv3.h:48:16: error: implicit declaration of function 'read_sysreg' [-Werror=implicit-function-declaration] 48 | return read_sysreg(a32); \ | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:51:1: note: in expansion of macro 'CPUIF_MAP' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:18:55: error: 'c12' undeclared (first use in this function) 18 | #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:51:11: note: in expansion of macro 'ICC_EOIR1' 51 | CPUIF_MAP(ICC_EOIR1, ICC_EOIR1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_PMR_EL1': >> arch/arm/include/asm/arch_gicv3.h:22:55: error: 'c4' undeclared (first use in this function) 22 | #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:52:11: note: in expansion of macro 'ICC_PMR' 52 | CPUIF_MAP(ICC_PMR, ICC_PMR_EL1) | ^~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:22:62: error: 'c6' undeclared (first use in this function) 22 | #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:52:11: note: in expansion of macro 'ICC_PMR' 52 | CPUIF_MAP(ICC_PMR, ICC_PMR_EL1) | ^~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_PMR_EL1': >> arch/arm/include/asm/arch_gicv3.h:22:55: error: 'c4' undeclared (first use in this function) 22 | #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:52:11: note: in expansion of macro 'ICC_PMR' 52 | CPUIF_MAP(ICC_PMR, ICC_PMR_EL1) | ^~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:22:62: error: 'c6' undeclared (first use in this function) 22 | #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:52:11: note: in expansion of macro 'ICC_PMR' 52 | CPUIF_MAP(ICC_PMR, ICC_PMR_EL1) | ^~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP0R0_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:30:41: note: in expansion of macro '__ICC_AP0Rx' 30 | #define ICC_AP0R0 __ICC_AP0Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:53:11: note: in expansion of macro 'ICC_AP0R0' 53 | CPUIF_MAP(ICC_AP0R0, ICC_AP0R0_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:30:41: note: in expansion of macro '__ICC_AP0Rx' 30 | #define ICC_AP0R0 __ICC_AP0Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:53:11: note: in expansion of macro 'ICC_AP0R0' 53 | CPUIF_MAP(ICC_AP0R0, ICC_AP0R0_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP0R0_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:30:41: note: in expansion of macro '__ICC_AP0Rx' 30 | #define ICC_AP0R0 __ICC_AP0Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:53:11: note: in expansion of macro 'ICC_AP0R0' 53 | CPUIF_MAP(ICC_AP0R0, ICC_AP0R0_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:30:41: note: in expansion of macro '__ICC_AP0Rx' 30 | #define ICC_AP0R0 __ICC_AP0Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:53:11: note: in expansion of macro 'ICC_AP0R0' 53 | CPUIF_MAP(ICC_AP0R0, ICC_AP0R0_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP0R1_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:31:41: note: in expansion of macro '__ICC_AP0Rx' 31 | #define ICC_AP0R1 __ICC_AP0Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:54:11: note: in expansion of macro 'ICC_AP0R1' 54 | CPUIF_MAP(ICC_AP0R1, ICC_AP0R1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:31:41: note: in expansion of macro '__ICC_AP0Rx' 31 | #define ICC_AP0R1 __ICC_AP0Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:54:11: note: in expansion of macro 'ICC_AP0R1' 54 | CPUIF_MAP(ICC_AP0R1, ICC_AP0R1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP0R1_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:31:41: note: in expansion of macro '__ICC_AP0Rx' 31 | #define ICC_AP0R1 __ICC_AP0Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:54:11: note: in expansion of macro 'ICC_AP0R1' 54 | CPUIF_MAP(ICC_AP0R1, ICC_AP0R1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:31:41: note: in expansion of macro '__ICC_AP0Rx' 31 | #define ICC_AP0R1 __ICC_AP0Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:54:11: note: in expansion of macro 'ICC_AP0R1' 54 | CPUIF_MAP(ICC_AP0R1, ICC_AP0R1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP0R2_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:32:41: note: in expansion of macro '__ICC_AP0Rx' 32 | #define ICC_AP0R2 __ICC_AP0Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:55:11: note: in expansion of macro 'ICC_AP0R2' 55 | CPUIF_MAP(ICC_AP0R2, ICC_AP0R2_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:32:41: note: in expansion of macro '__ICC_AP0Rx' 32 | #define ICC_AP0R2 __ICC_AP0Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:55:11: note: in expansion of macro 'ICC_AP0R2' 55 | CPUIF_MAP(ICC_AP0R2, ICC_AP0R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP0R2_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:32:41: note: in expansion of macro '__ICC_AP0Rx' 32 | #define ICC_AP0R2 __ICC_AP0Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:55:11: note: in expansion of macro 'ICC_AP0R2' 55 | CPUIF_MAP(ICC_AP0R2, ICC_AP0R2_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:32:41: note: in expansion of macro '__ICC_AP0Rx' 32 | #define ICC_AP0R2 __ICC_AP0Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:55:11: note: in expansion of macro 'ICC_AP0R2' 55 | CPUIF_MAP(ICC_AP0R2, ICC_AP0R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP0R3_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:33:41: note: in expansion of macro '__ICC_AP0Rx' 33 | #define ICC_AP0R3 __ICC_AP0Rx(3) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:56:11: note: in expansion of macro 'ICC_AP0R3' 56 | CPUIF_MAP(ICC_AP0R3, ICC_AP0R3_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:33:41: note: in expansion of macro '__ICC_AP0Rx' 33 | #define ICC_AP0R3 __ICC_AP0Rx(3) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:56:11: note: in expansion of macro 'ICC_AP0R3' 56 | CPUIF_MAP(ICC_AP0R3, ICC_AP0R3_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP0R3_EL1': arch/arm/include/asm/arch_gicv3.h:29:55: error: 'c12' undeclared (first use in this function) 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:33:41: note: in expansion of macro '__ICC_AP0Rx' 33 | #define ICC_AP0R3 __ICC_AP0Rx(3) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:56:11: note: in expansion of macro 'ICC_AP0R3' 56 | CPUIF_MAP(ICC_AP0R3, ICC_AP0R3_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:29:63: error: 'c8' undeclared (first use in this function); did you mean 'u8'? 29 | #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:33:41: note: in expansion of macro '__ICC_AP0Rx' 33 | #define ICC_AP0R3 __ICC_AP0Rx(3) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:56:11: note: in expansion of macro 'ICC_AP0R3' 56 | CPUIF_MAP(ICC_AP0R3, ICC_AP0R3_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R0_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:36:41: note: in expansion of macro '__ICC_AP1Rx' 36 | #define ICC_AP1R0 __ICC_AP1Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:57:11: note: in expansion of macro 'ICC_AP1R0' 57 | CPUIF_MAP(ICC_AP1R0, ICC_AP1R0_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:36:41: note: in expansion of macro '__ICC_AP1Rx' 36 | #define ICC_AP1R0 __ICC_AP1Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:57:11: note: in expansion of macro 'ICC_AP1R0' 57 | CPUIF_MAP(ICC_AP1R0, ICC_AP1R0_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP1R0_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:36:41: note: in expansion of macro '__ICC_AP1Rx' 36 | #define ICC_AP1R0 __ICC_AP1Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:57:11: note: in expansion of macro 'ICC_AP1R0' 57 | CPUIF_MAP(ICC_AP1R0, ICC_AP1R0_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:36:41: note: in expansion of macro '__ICC_AP1Rx' 36 | #define ICC_AP1R0 __ICC_AP1Rx(0) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:57:11: note: in expansion of macro 'ICC_AP1R0' 57 | CPUIF_MAP(ICC_AP1R0, ICC_AP1R0_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R1_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:37:41: note: in expansion of macro '__ICC_AP1Rx' 37 | #define ICC_AP1R1 __ICC_AP1Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:58:11: note: in expansion of macro 'ICC_AP1R1' 58 | CPUIF_MAP(ICC_AP1R1, ICC_AP1R1_EL1) | ^~~~~~~~~ >> arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:37:41: note: in expansion of macro '__ICC_AP1Rx' 37 | #define ICC_AP1R1 __ICC_AP1Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:58:11: note: in expansion of macro 'ICC_AP1R1' 58 | CPUIF_MAP(ICC_AP1R1, ICC_AP1R1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP1R1_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:37:41: note: in expansion of macro '__ICC_AP1Rx' 37 | #define ICC_AP1R1 __ICC_AP1Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:58:11: note: in expansion of macro 'ICC_AP1R1' 58 | CPUIF_MAP(ICC_AP1R1, ICC_AP1R1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:37:41: note: in expansion of macro '__ICC_AP1Rx' 37 | #define ICC_AP1R1 __ICC_AP1Rx(1) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:58:11: note: in expansion of macro 'ICC_AP1R1' 58 | CPUIF_MAP(ICC_AP1R1, ICC_AP1R1_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R2_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:38:41: note: in expansion of macro '__ICC_AP1Rx' 38 | #define ICC_AP1R2 __ICC_AP1Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:59:11: note: in expansion of macro 'ICC_AP1R2' 59 | CPUIF_MAP(ICC_AP1R2, ICC_AP1R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:38:41: note: in expansion of macro '__ICC_AP1Rx' 38 | #define ICC_AP1R2 __ICC_AP1Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:59:11: note: in expansion of macro 'ICC_AP1R2' 59 | CPUIF_MAP(ICC_AP1R2, ICC_AP1R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'read_ICC_AP1R2_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:38:41: note: in expansion of macro '__ICC_AP1Rx' 38 | #define ICC_AP1R2 __ICC_AP1Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:59:11: note: in expansion of macro 'ICC_AP1R2' 59 | CPUIF_MAP(ICC_AP1R2, ICC_AP1R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~ arch/arm/include/asm/arch_gicv3.h:48:28: note: in definition of macro 'CPUIF_MAP' 48 | return read_sysreg(a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:38:41: note: in expansion of macro '__ICC_AP1Rx' 38 | #define ICC_AP1R2 __ICC_AP1Rx(2) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:59:11: note: in expansion of macro 'ICC_AP1R2' 59 | CPUIF_MAP(ICC_AP1R2, ICC_AP1R2_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R3_EL1': arch/arm/include/asm/arch_gicv3.h:35:55: error: 'c12' undeclared (first use in this function) 35 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) | ^~~ arch/arm/include/asm/arch_gicv3.h:44:27: note: in definition of macro 'CPUIF_MAP' 44 | write_sysreg(val, a32); \ | ^~~ arch/arm/include/asm/arch_gicv3.h:39:41: note: in expansion of macro '__ICC_AP1Rx' 39 | #define ICC_AP1R3 __ICC_AP1Rx(3) | ^~~~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:60:11: note: in expansion of macro 'ICC_AP1R3' 60 | CPUIF_MAP(ICC_AP1R3, ICC_AP1R3_EL1) | ^~~~~~~~~ arch/arm/include/asm/arch_gicv3.h:35:63: error: 'c9' undeclared (first use in this function) Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for DRM_TTM Depends on [n]: HAS_IOMEM [=y] && DRM [=m] && MMU [=n] Selected by [m]: - DRM_TTM_HELPER [=m] && HAS_IOMEM [=y] && DRM [=m] - DRM_HISI_HIBMC [=m] && HAS_IOMEM [=y] && DRM [=m] && PCI [=y] && (ARM64 || COMPILE_TEST [=y]) vim +/write_sysreg +44 arch/arm/include/asm/arch_gicv3.h d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 17 d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 @18 #define ICC_EOIR1 __ACCESS_CP15(c12, 0, c12, 1) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 @19 #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 20 #define ICC_IAR1 __ACCESS_CP15(c12, 0, c12, 0) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 @21 #define ICC_SGI1R __ACCESS_CP15_64(0, c12) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 @22 #define ICC_PMR __ACCESS_CP15(c4, 0, c6, 0) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 23 #define ICC_CTLR __ACCESS_CP15(c12, 0, c12, 4) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 24 #define ICC_SRE __ACCESS_CP15(c12, 0, c12, 5) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 25 #define ICC_IGRPEN1 __ACCESS_CP15(c12, 0, c12, 7) 91ef84428a86b7 Daniel Thompson 2016-08-19 26 #define ICC_BPR1 __ACCESS_CP15(c12, 0, c12, 3) e99da7c6f51b48 Julien Thierry 2019-01-31 27 #define ICC_RPR __ACCESS_CP15(c12, 0, c11, 3) d5cd50d318f70f Jean-Philippe Brucker 2015-10-01 28 d6062a6d62c643 Marc Zyngier 2018-03-09 @29 #define __ICC_AP0Rx(x) __ACCESS_CP15(c12, 0, c8, 4 | x) d6062a6d62c643 Marc Zyngier 2018-03-09 30 #define ICC_AP0R0 __ICC_AP0Rx(0) d6062a6d62c643 Marc Zyngier 2018-03-09 31 #define ICC_AP0R1 __ICC_AP0Rx(1) d6062a6d62c643 Marc Zyngier 2018-03-09 32 #define ICC_AP0R2 __ICC_AP0Rx(2) d6062a6d62c643 Marc Zyngier 2018-03-09 33 #define ICC_AP0R3 __ICC_AP0Rx(3) d6062a6d62c643 Marc Zyngier 2018-03-09 34 d6062a6d62c643 Marc Zyngier 2018-03-09 @35 #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) d6062a6d62c643 Marc Zyngier 2018-03-09 36 #define ICC_AP1R0 __ICC_AP1Rx(0) d6062a6d62c643 Marc Zyngier 2018-03-09 37 #define ICC_AP1R1 __ICC_AP1Rx(1) d6062a6d62c643 Marc Zyngier 2018-03-09 38 #define ICC_AP1R2 __ICC_AP1Rx(2) d6062a6d62c643 Marc Zyngier 2018-03-09 39 #define ICC_AP1R3 __ICC_AP1Rx(3) d6062a6d62c643 Marc Zyngier 2018-03-09 40 a078bedf17c2e4 Vladimir Murzin 2016-09-12 41 #define CPUIF_MAP(a32, a64) \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 42 static inline void write_ ## a64(u32 val) \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 43 { \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 @44 write_sysreg(val, a32); \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 45 } \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 46 static inline u32 read_ ## a64(void) \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 47 { \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 @48 return read_sysreg(a32); \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 49 } \ a078bedf17c2e4 Vladimir Murzin 2016-09-12 50 :::::: The code at line 44 was first introduced by commit :::::: a078bedf17c2e43819fea54bdfd5793845142e3a ARM: gic-v3: Introduce 32-to-64-bit mappings for GICv3 cpu registers :::::: TO: Vladimir Murzin <vladimir.murzin@xxxxxxx> :::::: CC: Christoffer Dall <christoffer.dall@xxxxxxxxxx> -- 0-DAY CI Kernel Test Service https://01.org/lkp
