On 8/16/2022 1:56 PM, huang ying wrote: <snip> >>> >>> If my understanding were correct, you are suggesting to use a kind of >>> logarithmic mapping from latency to abstract distance? That is, >>> >>> abstract_distance = log2(latency) >>> >>> While I am suggesting to use a kind of linear mapping from latency to >>> abstract distance. That is, >>> >>> abstract_distance = C * latency >>> >>> I think that linear mapping is easy to understand. >>> >>> Are there some good reasons to use logarithmic mapping? >> >> Also, what is the recommendation for using bandwidth measure which >> may be available from HMAT for CXL memory? How is bandwidth going >> to influence the abstract distance? > > This is a good question. > > Per my understanding, latency stands for idle latency by default. But > in practice, the latency under some reasonable memory accessing > throughput is the "real" latency. So the memory with lower bandwidth > should have a larger abstract distance than the memory with higher > bandwidth even if the idle latency is the same. But I don't have a > perfect formula to combine idle latency and bandwidth into abstract > distance. One possibility is to increase abstract distance if the > bandwidth of the memory is much lower than that of DRAM. So if the firmware/platforms differ in their definition of latency and bandwidth (like idle vs real value etc) in the firmware tables (like HMAT), then the low level drivers (like ACPI) would have to be aware of these and handle the conversion from latency and bw to abstract distance correctly? Regards, Bharata.
