> -----Original Message----- > From: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > Sent: Wednesday, July 13, 2022 07:13 > To: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>; Lutomirski, Andy > <luto@xxxxxxxxxx>; Peter Zijlstra <peterz@xxxxxxxxxxxxx> > Cc: x86@xxxxxxxxxx; Kostya Serebryany <kcc@xxxxxxxxxx>; Andrey Ryabinin > <ryabinin.a.a@xxxxxxxxx>; Andrey Konovalov <andreyknvl@xxxxxxxxx>; > Alexander Potapenko <glider@xxxxxxxxxx>; Taras Madan > <tarasmadan@xxxxxxxxxx>; Dmitry Vyukov <dvyukov@xxxxxxxxxx>; H . J . Lu > <hjl.tools@xxxxxxxxx>; Andi Kleen <ak@xxxxxxxxxxxxxxx>; Edgecombe, Rick P > <rick.p.edgecombe@xxxxxxxxx>; linux-mm@xxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > Subject: [PATCHv5 01/13] x86/mm: Fix CR3_ADDR_MASK > > The mask must not include bits above physical address mask. These bits are > reserved and can be used for other things. Bits 61 and 62 are used for Linear > Address Masking. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > Reviewed-by: Rick Edgecombe <rick.p.edgecombe@xxxxxxxxx> > --- > arch/x86/include/asm/processor-flags.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/processor-flags.h > b/arch/x86/include/asm/processor-flags.h > index 02c2cbda4a74..a7f3d9100adb 100644 > --- a/arch/x86/include/asm/processor-flags.h > +++ b/arch/x86/include/asm/processor-flags.h > @@ -35,7 +35,7 @@ > */ [Hu, Robert] The comments above these #define's, explaining CR3 layout, can be updated on the new CR3 bits as well? > #ifdef CONFIG_X86_64 > /* Mask off the address space ID and SME encryption bits. */ > -#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) > +#define CR3_ADDR_MASK __sme_clr(PHYSICAL_PAGE_MASK) > #define CR3_PCID_MASK 0xFFFull > #define CR3_NOFLUSH BIT_ULL(63) > > -- > 2.35.1
