On Fri, 2022-06-10 at 17:35 +0300, Kirill A. Shutemov wrote: > The mask must not include bits above physical address mask. These > bits > are reserved and can be used for other things. Bits 61 and 62 are > used > for Linear Address Masking. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > --- > arch/x86/include/asm/processor-flags.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/processor-flags.h > b/arch/x86/include/asm/processor-flags.h > index 02c2cbda4a74..a7f3d9100adb 100644 > --- a/arch/x86/include/asm/processor-flags.h > +++ b/arch/x86/include/asm/processor-flags.h > @@ -35,7 +35,7 @@ > */ > #ifdef CONFIG_X86_64 > /* Mask off the address space ID and SME encryption bits. */ > -#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull) > +#define CR3_ADDR_MASK __sme_clr(PHYSICAL_PAGE_MASK) > #define CR3_PCID_MASK 0xFFFull > #define CR3_NOFLUSH BIT_ULL(63) > Reviewed-by: Rick Edgecombe <rick.p.edgecombe@xxxxxxxxx>
