On Thu, Apr 7, 2022 at 5:25 PM Catalin Marinas <catalin.marinas@xxxxxxx> wrote: > > On Thu, Apr 07, 2022 at 02:14:15PM +0800, Muchun Song wrote: > > On Tue, Apr 05, 2022 at 02:57:55PM +0100, Catalin Marinas wrote: > > > ARCH_DMA_MINALIGN represents the minimum (static) alignment for safe DMA > > > operations while ARCH_KMALLOC_MINALIGN is the minimum kmalloc() objects > > > alignment. > > > > > > Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx> > > > Cc: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> > > > Cc: "David S. Miller" <davem@xxxxxxxxxxxxx> > > > --- > > > include/linux/crypto.h | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/include/linux/crypto.h b/include/linux/crypto.h > > > index 2324ab6f1846..654b9c355575 100644 > > > --- a/include/linux/crypto.h > > > +++ b/include/linux/crypto.h > > > @@ -167,7 +167,7 @@ > > > * maintenance for non-coherent DMA (cache invalidation in particular) does not > > > * affect data that may be accessed by the CPU concurrently. > > > */ > > > -#define CRYPTO_MINALIGN ARCH_KMALLOC_MINALIGN > > > +#define CRYPTO_MINALIGN ARCH_DMA_MINALIGN > > > > I don't think this should be changed since ARCH_KMALLOC_MINALIGN is > > already aligned with the size what you need. > > With this series, ARCH_KMALLOC_MINALIGN is no longer safe for > non-coherent DMA on all arm64 SoCs, that's what ARCH_DMA_MINALIGN will > cover. > > Now, looking at the comment for CRYPTO_MINALIGN, one aspect it covers is > the minimum alignment required by C for the crypto_tfm structure access. > So a smaller ARCH_KMALLOC_MINALIGN would do. But the other part of the > comment mentions in-structure alignment for non-coherent DMA. Here we'd > need the upper bound alignment, ARCH_DMA_MINALIGN. > > I'll follow up on Herbert's email as I think he has a good point on > structure vs kmalloc() alignment. Got it. Now I know what you want to do. You want to set ARCH_KMALLOC_MINALIGN to 64, however, the smallest size of kmem_cache depends on the cache line size at runtime. But we have to know the safe alignment at building time. So we have to make those align with ARCH_DMA_MINALIGN. Right? I think you are on the right road since most CPUs have a 64-byte cache line. Thanks.
