On Wed, Mar 30, 2022 at 12:25:43PM +0100, Steve Capper wrote: > tlb_remove_huge_tlb_entry only considers PMD_SIZE and PUD_SIZE when > updating the mmu_gather structure. > > Unfortunately on arm64 there are two additional huge page sizes that > need to be covered: CONT_PTE_SIZE and CONT_PMD_SIZE. Where an end-user > attempts to employ contiguous huge pages, a VM_BUG_ON can be experienced > due to the fact that the tlb structure hasn't been correctly updated by > the relevant tlb_flush_p.._range() call from tlb_remove_huge_tlb_entry. > > This patch adds inequality logic to the generic implementation of > tlb_remove_huge_tlb_entry s.t. CONT_PTE_SIZE and CONT_PMD_SIZE are > effectively covered on arm64. Also, as well as ptes, pmds and puds; > p4ds are now considered too. > > Reported-by: David Hildenbrand <david@xxxxxxxxxx> > Suggested-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> > Cc: Anshuman Khandual <anshuman.khandual@xxxxxxx> > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > Cc: Will Deacon <will@xxxxxxxxxx> > Link: https://lore.kernel.org/linux-mm/811c5c8e-b3a2-85d2-049c-717f17c3a03a@xxxxxxxxxx/ > Signed-off-by: Steve Capper <steve.capper@xxxxxxx> Acked-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> > --- > include/asm-generic/tlb.h | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h > index 2c68a545ffa7..71942a1c642d 100644 > --- a/include/asm-generic/tlb.h > +++ b/include/asm-generic/tlb.h > @@ -565,10 +565,14 @@ static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, > #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ > do { \ > unsigned long _sz = huge_page_size(h); \ > - if (_sz == PMD_SIZE) \ > - tlb_flush_pmd_range(tlb, address, _sz); \ > - else if (_sz == PUD_SIZE) \ > + if (_sz >= P4D_SIZE) \ > + tlb_flush_p4d_range(tlb, address, _sz); \ > + else if (_sz >= PUD_SIZE) \ > tlb_flush_pud_range(tlb, address, _sz); \ > + else if (_sz >= PMD_SIZE) \ > + tlb_flush_pmd_range(tlb, address, _sz); \ > + else \ > + tlb_flush_pte_range(tlb, address, _sz); \ > __tlb_remove_tlb_entry(tlb, ptep, address); \ > } while (0) > > -- > 2.35.1 >