"Aneesh Kumar K.V" <aneesh.kumar@xxxxxxxxxxxxx> writes: > "Huang, Ying" <ying.huang@xxxxxxxxx> writes: > >> Hi, Jagdish, >> >> Jagdish Gediya <jvgediya@xxxxxxxxxxxxx> writes: >> > > ... > >>> e.g. with below NUMA topology, where node 0 & 1 are >>> cpu + dram nodes, node 2 & 3 are equally slower memory >>> only nodes, and node 4 is slowest memory only node, >>> >>> available: 5 nodes (0-4) >>> node 0 cpus: 0 1 >>> node 0 size: n MB >>> node 0 free: n MB >>> node 1 cpus: 2 3 >>> node 1 size: n MB >>> node 1 free: n MB >>> node 2 cpus: >>> node 2 size: n MB >>> node 2 free: n MB >>> node 3 cpus: >>> node 3 size: n MB >>> node 3 free: n MB >>> node 4 cpus: >>> node 4 size: n MB >>> node 4 free: n MB >>> node distances: >>> node 0 1 2 3 4 >>> 0: 10 20 40 40 80 >>> 1: 20 10 40 40 80 >>> 2: 40 40 10 40 80 >>> 3: 40 40 40 10 80 >>> 4: 80 80 80 80 10 >>> >>> The existing implementation gives below demotion targets, >>> >>> node demotion_target >>> 0 3, 2 >>> 1 4 >>> 2 X >>> 3 X >>> 4 X >>> >>> With this patch applied, below are the demotion targets, >>> >>> node demotion_target >>> 0 3, 2 >>> 1 3, 2 >>> 2 3 >>> 3 4 >>> 4 X >> >> For such machine, I think the perfect demotion order is, >> >> node demotion_target >> 0 2, 3 >> 1 2, 3 >> 2 4 >> 3 4 >> 4 X > > I guess the "equally slow nodes" is a confusing definition here. Now if the > system consists of 2 1GB equally slow memory and the firmware doesn't want to > differentiate between them, firmware can present a single NUMA node > with 2GB capacity? The fact that we are finding two NUMA nodes is a hint > that there is some difference between these two memory devices. This is > also captured by the fact that the distance between 2 and 3 is 40 and not 10. Do you have more information about this? Best Regards, Huang, Ying > For that specific topology where the distance between 2 and 3 is 40 and 2 > and 4 is 80, the demotion target derived by the new code is better > right? > > ... > > > -aneesh
