On 3/23/22 09:34, Steve Capper wrote: > > > On 23/03/2022 16:21, Catalin Marinas wrote: >> On Wed, Mar 23, 2022 at 11:51:25AM +0000, Steve Capper wrote: >>> On 22/03/2022 17:56, Catalin Marinas wrote: >>>> At a quick look, we wouldn't have a problem with missing TLB flushing >>>> since huge_ptep_get_and_clear() does this for contiguous PTEs. Not sure >>>> why it needs this though, Steve added it in commit d8bdcff28764. I think >>>> we can defer this flushing to tlb_remove_page_size(). >>> >>> The TLB flush in huge_ptep_get_and_clear() was added because it was called >>> by hugetlb_change_protection() without any flushing. The concern was that, >>> without the flush, it would be possible to get to different views of the >>> same contiguous huge page. (Being contiguous they were not changed en masse >>> atomically). >> >> Maybe the code paths have been changed since but looking at >> hugetlb_change_protection(), we have huge_ptep_modify_prot_start() >> calling huge_ptep_get_and_clear() which AFAICT only needs to clear the >> ptes. huge_ptep_modify_prot_commit() calls set_huge_pte_at() which does >> another pte clearing + TLBI (clear_flush()) before setting the new ptes. >> So we do the pte clearing and TLBI twice already. >> > > Thanks, yeah indeed the code has changed and the flush should be removed from the arm64 huge_ptep_get_and_clear. > Thanks Catalin and Steve for the arm64 expertise. Aneesh, IIUC powerpc also has hugetlb sizes that are not PMD_SIZE or PUD_SIZE. Is that correct? If so, then I would expect the same issue there. Steve's patch makes tlb_remove_huge_tlb_entry able to be arch specific, so there may need to be a powerpc specific version. -- Mike Kravetz
