UAI feature is enabled by setting bit 20 in EFER MSR.
Signed-off-by: Bharata B Rao <bharata@xxxxxxx>
---
arch/x86/include/asm/msr-index.h | 2 ++
arch/x86/kernel/setup.c | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index a4a39c3e0f19..ce763952278f 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -30,6 +30,7 @@
#define _EFER_SVME 12 /* Enable virtualization */
#define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */
#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */
+#define _EFER_UAI 20 /* Enable Upper Address Ignore */
#define EFER_SCE (1<<_EFER_SCE)
#define EFER_LME (1<<_EFER_LME)
@@ -38,6 +39,7 @@
#define EFER_SVME (1<<_EFER_SVME)
#define EFER_LMSLE (1<<_EFER_LMSLE)
#define EFER_FFXSR (1<<_EFER_FFXSR)
+#define EFER_UAI (1<<_EFER_UAI)
/* Intel MSRs. Some also available on other CPUs */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index f7a132eb794d..12615b1b4af5 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -740,6 +740,12 @@ dump_kernel_offset(struct notifier_block *self, unsigned long v, void *p)
return 0;
}
+static inline void __init uai_enable(void)
+{
+ if (boot_cpu_has(X86_FEATURE_UAI))
+ msr_set_bit(MSR_EFER, _EFER_UAI);
+}
+
/*
* Determine if we were loaded by an EFI loader. If so, then we have also been
* passed the efi memmap, systab, etc., so we should use these data structures
@@ -1146,6 +1152,8 @@ void __init setup_arch(char **cmdline_p)
x86_init.paging.pagetable_init();
+ uai_enable();
+
kasan_init();
/*
--
2.25.1
