On Tue, Jun 15, 2021 at 10:46:39AM +0100, Will Deacon wrote: > Then the compiler can allocate the same register for x and z, but will > issue an additional load for y. If a concurrent update takes place to the > pmd which transitions from Invalid -> Valid, then it will look as though > things went back in time, because z will be stale. We actually hit this > on arm64 in practice [1]. The fact you actually hit this in the real world just seem to confirm my thinking that the mm's lax use of the memory model is something that deserves addressing. Honestly I'm not sure the fix to stick a READ_ONCE in the macros is very robust. I prefer the gup_fast pattern of: pmd_t pmd = READ_ONCE(*pmdp); pte_offset_phys(&pmd, addr); To correctly force the READ_ONCE under unlocked access and the consistently use the single read of the unstable data. It seems more maintainable 'hey look at me, I have no locks!' and has fewer possibilities for obscure order related bugs to creep in. Jason
