Re: [PATCH v22 8/8] x86/vdso: Add ENDBR64 to __vdso_sgx_enter_enclave

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On Wed, Mar 10, 2021 at 02:55:55PM -0800, Yu, Yu-cheng wrote:
> On 3/10/2021 2:39 PM, Jarkko Sakkinen wrote:
> > On Wed, Mar 10, 2021 at 02:05:19PM -0800, Yu-cheng Yu wrote:
> > > When CET is enabled, __vdso_sgx_enter_enclave() needs an endbr64
> > > in the beginning of the function.
> > 
> > OK.
> > 
> > What you should do is to explain what it does and why it's needed.
> > 
> 
> The endbr marks a branch target.  Without the "no-track" prefix, if an
> indirect call/jmp reaches a non-endbr opcode, a control-protection fault is
> raised.  Usually endbr's are inserted by the compiler.  For assembly, these
> have to be put in manually.  I will add this in the commit log if there is
> another revision.  Thanks!

Thanks for the explanation. There is another revision, because this is
lacking from the commit message.

Does it do any harm to put it there unconditionally?

> 
> --
> Yu-cheng
> 
> > > 
> > > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
> > > Cc: Andy Lutomirski <luto@xxxxxxxxxx>
> > > Cc: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
> > > Cc: Jarkko Sakkinen <jarkko@xxxxxxxxxx>
> > > ---
> > >   arch/x86/entry/vdso/vsgx.S | 3 +++
> > >   1 file changed, 3 insertions(+)
> > > 
> > > diff --git a/arch/x86/entry/vdso/vsgx.S b/arch/x86/entry/vdso/vsgx.S
> > > index 86a0e94f68df..a70d4d09f713 100644
> > > --- a/arch/x86/entry/vdso/vsgx.S
> > > +++ b/arch/x86/entry/vdso/vsgx.S
> > > @@ -27,6 +27,9 @@
> > >   SYM_FUNC_START(__vdso_sgx_enter_enclave)
> > >   	/* Prolog */
> > >   	.cfi_startproc
> > > +#ifdef CONFIG_X86_CET
> > > +	endbr64
> > > +#endif
> > >   	push	%rbp
> > >   	.cfi_adjust_cfa_offset	8
> > >   	.cfi_rel_offset		%rbp, 0
> > > -- 
> > > 2.21.0
> > > 
> > > 
> > 
> > /Jarkko
> > 
> 
> 

/Jarkko




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