[linux-next:master 1543/4500] drivers/gpio/gpio-tegra.c:364:7: error: 'struct irq_data' has no member named 'parent_data'

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   93bf8b946e5f9a0b0c68155597b53fd8ccce2827
commit: efcdca286eefb248d15a49a32a802ed11146e65e [1543/4500] gpio: tegra: Convert to gpio_irq_chip
config: h8300-randconfig-r012-20210118 (attached as .config)
compiler: h8300-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=efcdca286eefb248d15a49a32a802ed11146e65e
        git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
        git fetch --no-tags linux-next master
        git checkout efcdca286eefb248d15a49a32a802ed11146e65e
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=h8300 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

   drivers/gpio/gpio-tegra.c: In function 'tegra_gpio_irq_set_type':
>> drivers/gpio/gpio-tegra.c:364:7: error: 'struct irq_data' has no member named 'parent_data'
     364 |  if (d->parent_data)
         |       ^~
>> drivers/gpio/gpio-tegra.c:365:9: error: implicit declaration of function 'irq_chip_set_type_parent' [-Werror=implicit-function-declaration]
     365 |   ret = irq_chip_set_type_parent(d, type);
         |         ^~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpio/gpio-tegra.c: In function 'tegra_gpio_child_to_parent_hwirq':
>> drivers/gpio/gpio-tegra.c:439:27: error: 'struct gpio_irq_chip' has no member named 'child_offset_to_irq'
     439 |  *parent_hwirq = chip->irq.child_offset_to_irq(chip, hwirq);
         |                           ^
   drivers/gpio/gpio-tegra.c: In function 'tegra_gpio_populate_parent_fwspec':
>> drivers/gpio/gpio-tegra.c:454:28: error: 'struct gpio_irq_chip' has no member named 'parent_domain'
     454 |  fwspec->fwnode = chip->irq.parent_domain->fwnode;
         |                            ^
   drivers/gpio/gpio-tegra.c: In function 'tegra_gpio_irq_set_affinity':
   drivers/gpio/gpio-tegra.c:566:10: error: 'struct irq_data' has no member named 'parent_data'
     566 |  if (data->parent_data)
         |          ^~
>> drivers/gpio/gpio-tegra.c:567:10: error: implicit declaration of function 'irq_chip_set_affinity_parent'; did you mean 'irq_set_affinity_hint'? [-Werror=implicit-function-declaration]
     567 |   return irq_chip_set_affinity_parent(data, dest, force);
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
         |          irq_set_affinity_hint
   drivers/gpio/gpio-tegra.c: In function 'tegra_gpio_probe':
>> drivers/gpio/gpio-tegra.c:730:5: error: 'struct gpio_irq_chip' has no member named 'fwnode'
     730 |  irq->fwnode = of_node_to_fwnode(pdev->dev.of_node);
         |     ^~
>> drivers/gpio/gpio-tegra.c:731:5: error: 'struct gpio_irq_chip' has no member named 'child_to_parent_hwirq'
     731 |  irq->child_to_parent_hwirq = tegra_gpio_child_to_parent_hwirq;
         |     ^~
>> drivers/gpio/gpio-tegra.c:732:5: error: 'struct gpio_irq_chip' has no member named 'populate_parent_alloc_arg'
     732 |  irq->populate_parent_alloc_arg = tegra_gpio_populate_parent_fwspec;
         |     ^~
   drivers/gpio/gpio-tegra.c:742:6: error: 'struct gpio_irq_chip' has no member named 'parent_domain'
     742 |   irq->parent_domain = irq_find_host(np);
         |      ^~
   drivers/gpio/gpio-tegra.c:745:11: error: 'struct gpio_irq_chip' has no member named 'parent_domain'
     745 |   if (!irq->parent_domain)
         |           ^~
   cc1: some warnings being treated as errors


vim +364 drivers/gpio/gpio-tegra.c

   301	
   302	static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
   303	{
   304		unsigned int gpio = d->hwirq, port = GPIO_PORT(gpio), lvl_type;
   305		struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
   306		struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
   307		struct tegra_gpio_bank *bank;
   308		unsigned long flags;
   309		int ret;
   310		u32 val;
   311	
   312		bank = &tgi->bank_info[GPIO_BANK(d->hwirq)];
   313	
   314		switch (type & IRQ_TYPE_SENSE_MASK) {
   315		case IRQ_TYPE_EDGE_RISING:
   316			lvl_type = GPIO_INT_LVL_EDGE_RISING;
   317			break;
   318	
   319		case IRQ_TYPE_EDGE_FALLING:
   320			lvl_type = GPIO_INT_LVL_EDGE_FALLING;
   321			break;
   322	
   323		case IRQ_TYPE_EDGE_BOTH:
   324			lvl_type = GPIO_INT_LVL_EDGE_BOTH;
   325			break;
   326	
   327		case IRQ_TYPE_LEVEL_HIGH:
   328			lvl_type = GPIO_INT_LVL_LEVEL_HIGH;
   329			break;
   330	
   331		case IRQ_TYPE_LEVEL_LOW:
   332			lvl_type = GPIO_INT_LVL_LEVEL_LOW;
   333			break;
   334	
   335		default:
   336			return -EINVAL;
   337		}
   338	
   339		raw_spin_lock_irqsave(&bank->lvl_lock[port], flags);
   340	
   341		val = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio));
   342		val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio));
   343		val |= lvl_type << GPIO_BIT(gpio);
   344		tegra_gpio_writel(tgi, val, GPIO_INT_LVL(tgi, gpio));
   345	
   346		raw_spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
   347	
   348		tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, gpio), gpio, 0);
   349		tegra_gpio_enable(tgi, gpio);
   350	
   351		ret = gpiochip_lock_as_irq(&tgi->gc, gpio);
   352		if (ret) {
   353			dev_err(tgi->dev,
   354				"unable to lock Tegra GPIO %u as IRQ\n", gpio);
   355			tegra_gpio_disable(tgi, gpio);
   356			return ret;
   357		}
   358	
   359		if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
   360			irq_set_handler_locked(d, handle_level_irq);
   361		else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
   362			irq_set_handler_locked(d, handle_edge_irq);
   363	
 > 364		if (d->parent_data)
 > 365			ret = irq_chip_set_type_parent(d, type);
   366	
   367		return ret;
   368	}
   369	
   370	static void tegra_gpio_irq_shutdown(struct irq_data *d)
   371	{
   372		struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
   373		struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
   374		unsigned int gpio = d->hwirq;
   375	
   376		tegra_gpio_irq_mask(d);
   377		gpiochip_unlock_as_irq(&tgi->gc, gpio);
   378	}
   379	
   380	static void tegra_gpio_irq_handler(struct irq_desc *desc)
   381	{
   382		struct tegra_gpio_info *tgi = irq_desc_get_handler_data(desc);
   383		struct irq_chip *chip = irq_desc_get_chip(desc);
   384		struct irq_domain *domain = tgi->gc.irq.domain;
   385		unsigned int irq = irq_desc_get_irq(desc);
   386		struct tegra_gpio_bank *bank = NULL;
   387		unsigned int port, pin, gpio, i;
   388		bool unmasked = false;
   389		unsigned long sta;
   390		u32 lvl;
   391	
   392		for (i = 0; i < tgi->bank_count; i++) {
   393			if (tgi->irqs[i] == irq) {
   394				bank = &tgi->bank_info[i];
   395				break;
   396			}
   397		}
   398	
   399		if (WARN_ON(bank == NULL))
   400			return;
   401	
   402		chained_irq_enter(chip, desc);
   403	
   404		for (port = 0; port < 4; port++) {
   405			gpio = tegra_gpio_compose(bank->bank, port, 0);
   406			sta = tegra_gpio_readl(tgi, GPIO_INT_STA(tgi, gpio)) &
   407				tegra_gpio_readl(tgi, GPIO_INT_ENB(tgi, gpio));
   408			lvl = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio));
   409	
   410			for_each_set_bit(pin, &sta, 8) {
   411				tegra_gpio_writel(tgi, 1 << pin,
   412						  GPIO_INT_CLR(tgi, gpio));
   413	
   414				/* if gpio is edge triggered, clear condition
   415				 * before executing the handler so that we don't
   416				 * miss edges
   417				 */
   418				if (!unmasked && lvl & (0x100 << pin)) {
   419					unmasked = true;
   420					chained_irq_exit(chip, desc);
   421				}
   422	
   423				irq = irq_find_mapping(domain, gpio + pin);
   424				if (WARN_ON(irq == 0))
   425					continue;
   426	
   427				generic_handle_irq(irq);
   428			}
   429		}
   430	
   431		if (!unmasked)
   432			chained_irq_exit(chip, desc);
   433	}
   434	
   435	static int tegra_gpio_child_to_parent_hwirq(struct gpio_chip *chip, unsigned int hwirq,
   436						    unsigned int type, unsigned int *parent_hwirq,
   437						    unsigned int *parent_type)
   438	{
 > 439		*parent_hwirq = chip->irq.child_offset_to_irq(chip, hwirq);
   440		*parent_type = type;
   441	
   442		return 0;
   443	}
   444	
   445	static void *tegra_gpio_populate_parent_fwspec(struct gpio_chip *chip, unsigned int parent_hwirq,
   446						       unsigned int parent_type)
   447	{
   448		struct irq_fwspec *fwspec;
   449	
   450		fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
   451		if (!fwspec)
   452			return NULL;
   453	
 > 454		fwspec->fwnode = chip->irq.parent_domain->fwnode;
   455		fwspec->param_count = 3;
   456		fwspec->param[0] = 0;
   457		fwspec->param[1] = parent_hwirq;
   458		fwspec->param[2] = parent_type;
   459	
   460		return fwspec;
   461	}
   462	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

Attachment: .config.gz
Description: application/gzip


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