On Thu, 25 Aug 2011, James Bottomley wrote: > >ARM seems to have these LDREX/STREX instructions for that purpose which > >seem to be used for generating atomic instructions without lockes. I > >guess > >other RISC architectures have similar means of doing it? > > Arm isn't really risc. Most don't. However even with ldrex/strex you need two instructions for rmw. Well then what is "really risc"? RISC is an old beaten down marketing term AFAICT and ARM claims it too. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/ Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>