tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 92edc4aef86780a8ad01b092c6d6630bb3cb423d commit: c07cbc1f04ecba00f99e313de3190db5e7438e81 [4466/5794] drm/amd/display: update dpp dto phase and modulo. config: i386-randconfig-a011-20201111 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 reproduce (this is a W=1 build): # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=c07cbc1f04ecba00f99e313de3190db5e7438e81 git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout c07cbc1f04ecba00f99e313de3190db5e7438e81 # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:46:6: warning: no previous prototype for 'dccg21_update_dpp_dto' [-Wmissing-prototypes] 46 | void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) | ^~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:86, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:27: drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning: 'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=] 50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = { | ^~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:27: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:126:22: warning: 'DP_DVI_CONVERTER_ID_5' defined but not used [-Wunused-const-variable=] 126 | static const uint8_t DP_DVI_CONVERTER_ID_5[] = "3393N2"; | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:125:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=] 125 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa"; | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:123:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=] 123 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:121:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=] 121 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/reg_helper.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:26: drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=] 76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL }; | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=] 75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL }; | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=] 74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL }; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=] 73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL }; | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=] 72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL }; | ^~~~~~~~~~~ vim +/dccg21_update_dpp_dto +46 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c 30 31 #define TO_DCN_DCCG(dccg)\ 32 container_of(dccg, struct dcn_dccg, base) 33 34 #define REG(reg) \ 35 (dccg_dcn->regs->reg) 36 37 #undef FN 38 #define FN(reg_name, field_name) \ 39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 40 41 #define CTX \ 42 dccg_dcn->base.ctx 43 #define DC_LOGGER \ 44 dccg->ctx->logger 45 > 46 void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) 47 { 48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); 49 50 if (dccg->ref_dppclk) { 51 int ref_dppclk = dccg->ref_dppclk; 52 int modulo = ref_dppclk / 10000; 53 54 if (req_dppclk) { 55 int phase; 56 57 /* 58 * program DPP DTO phase and modulo as below 59 * phase = dpp_pipe_clk_mhz / 10 60 * module = dpp_global_clk_mhz / 10 61 * dmub FW will read phase value to 62 * determine minimum dpp clk and notify smu 63 * to set clks for more power saving in PSR state 64 */ 65 phase = (req_dppclk + 9999) / 10000; 66 67 if (phase > 0xff) { 68 ASSERT(false); 69 phase = 0xff; 70 } 71 72 REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0, 73 DPPCLK0_DTO_PHASE, phase, 74 DPPCLK0_DTO_MODULO, modulo); 75 REG_UPDATE(DPPCLK_DTO_CTRL, 76 DPPCLK_DTO_ENABLE[dpp_inst], 1); 77 } else { 78 /* 79 * set phase to 10 if dpp isn't used to 80 * prevent hard hang if access dpp register 81 * on unused pipe 82 */ 83 REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0, 84 DPPCLK0_DTO_PHASE, 10, 85 DPPCLK0_DTO_MODULO, modulo); 86 87 REG_UPDATE(DPPCLK_DTO_CTRL, 88 DPPCLK_DTO_ENABLE[dpp_inst], 0); 89 } 90 } 91 92 dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk; 93 } 94 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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