[linux-next:master 2094/2270] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:96:6: warning: no previous prototype for function 'vg_update_clocks'

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Hi Alex,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head:   1c86f90a16d413621918ae1403842b43632f0b3d
commit: 5d7dd14d6bdc2d44f07cec98be65b6edbff2e51c [2094/2270] drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v2)
config: x86_64-randconfig-a005-20201028 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 50dfa19cc799ae7cddd39a95dbfce675a12672ad)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install x86_64 cross compiling tool for clang build
        # apt-get install binutils-x86-64-linux-gnu
        # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=5d7dd14d6bdc2d44f07cec98be65b6edbff2e51c
        git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
        git fetch --no-tags linux-next master
        git checkout 5d7dd14d6bdc2d44f07cec98be65b6edbff2e51c
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:96:6: warning: no previous prototype for function 'vg_update_clocks' [-Wmissing-prototypes]
   void vg_update_clocks(struct clk_mgr *clk_mgr_base,
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:96:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void vg_update_clocks(struct clk_mgr *clk_mgr_base,
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:375:6: warning: no previous prototype for function 'vg_get_clk_states' [-Wmissing-prototypes]
   void vg_get_clk_states(struct clk_mgr *clk_mgr_base, struct clk_states *s)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:375:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void vg_get_clk_states(struct clk_mgr *clk_mgr_base, struct clk_states *s)
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:393:6: warning: no previous prototype for function 'vg_init_clocks' [-Wmissing-prototypes]
   void vg_init_clocks(struct clk_mgr *clk_mgr)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:393:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void vg_init_clocks(struct clk_mgr *clk_mgr)
   ^
   static 
   3 warnings generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:91:5: warning: no previous prototype for function 'dcn301_smu_send_msg_with_param' [-Wmissing-prototypes]
   int dcn301_smu_send_msg_with_param(
       ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:91:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   int dcn301_smu_send_msg_with_param(
   ^
   static 
   1 warning generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:140:6: warning: no previous prototype for function 'dcn301_hw_sequencer_construct' [-Wmissing-prototypes]
   void dcn301_hw_sequencer_construct(struct dc *dc)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:140:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void dcn301_hw_sequencer_construct(struct dc *dc)
   ^
   static 
   1 warning generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:223:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: previous initialization is here
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:99:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:173:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:233:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: previous initialization is here
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:100:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:183:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DIG_FE_CNTL, DIG, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:243:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: previous initialization is here
           stream_enc_regs(0),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:50:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DIG_FE_CNTL, DIG, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:74:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
           stream_enc_regs(1),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:23:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: previous initialization is here
           stream_enc_regs(1),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:99:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:253:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
           stream_enc_regs(1),
           ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: expanded from macro 'stream_enc_regs'
           SE_DCN3_REG_LIST(id)\
           ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: expanded from macro 'SE_DCN3_REG_LIST'
           SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: expanded from macro 'SRI'
           .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
--
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:255:15: note: expanded from macro 'SR'
                   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
                               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:91:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:704:3: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
                   HUBBUB_REG_LIST_DCN301(0)
                   ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_hubbub.h:33:2: note: expanded from macro 'HUBBUB_REG_LIST_DCN301'
           HUBBUB_HVM_REG_LIST()
           ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_hubbub.h:42:2: note: expanded from macro 'HUBBUB_HVM_REG_LIST'
           SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D),\
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:255:15: note: expanded from macro 'SR'
                   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
                               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:27:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:704:3: note: previous initialization is here
                   HUBBUB_REG_LIST_DCN301(0)
                   ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_hubbub.h:32:2: note: expanded from macro 'HUBBUB_REG_LIST_DCN301'
           HUBBUB_REG_LIST_DCN30(id), \
           ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubbub.h:51:2: note: expanded from macro 'HUBBUB_REG_LIST_DCN30'
           SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D)
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:255:15: note: expanded from macro 'SR'
                   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
                               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:95:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:728:3: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
                   HWSEQ_DCN301_REG_LIST()
                   ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:368:2: note: expanded from macro 'HWSEQ_DCN301_REG_LIST'
           SR(DCFCLK_CNTL), \
           ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:255:15: note: expanded from macro 'SR'
                   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
                               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: expanded from macro 'BASE'
   #define BASE(seg) BASE_INNER(seg)
                     ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:52:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:728:3: note: previous initialization is here
                   HWSEQ_DCN301_REG_LIST()
                   ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:367:2: note: expanded from macro 'HWSEQ_DCN301_REG_LIST'
           SR(DCFCLK_CNTL),\
           ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:255:15: note: expanded from macro 'SR'
                   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
                               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: expanded from macro 'BASE'
   #define BASE(seg) BASE_INNER(seg)
                     ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: expanded from macro 'BASE_INNER'
   #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
                           ^
   <scratch space>:48:1: note: expanded from here
   DCN_BASE__INST0_SEG2
   ^
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: expanded from macro 'DCN_BASE__INST0_SEG2'
   #define DCN_BASE__INST0_SEG2                       0x000034C0
                                                      ^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:853:6: warning: no previous prototype for function 'dcn301_dpp_destroy' [-Wmissing-prototypes]
   void dcn301_dpp_destroy(struct dpp **dpp)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:853:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void dcn301_dpp_destroy(struct dpp **dpp)
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:859:13: warning: no previous prototype for function 'dcn301_dpp_create' [-Wmissing-prototypes]
   struct dpp *dcn301_dpp_create(
               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:859:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct dpp *dcn301_dpp_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:877:32: warning: no previous prototype for function 'dcn301_opp_create' [-Wmissing-prototypes]
   struct output_pixel_processor *dcn301_opp_create(
                                  ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:877:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct output_pixel_processor *dcn301_opp_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:893:17: warning: no previous prototype for function 'dcn301_aux_engine_create' [-Wmissing-prototypes]
   struct dce_aux *dcn301_aux_engine_create(
                   ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:893:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct dce_aux *dcn301_aux_engine_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:929:20: warning: no previous prototype for function 'dcn301_i2c_hw_create' [-Wmissing-prototypes]
   struct dce_i2c_hw *dcn301_i2c_hw_create(
                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:929:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct dce_i2c_hw *dcn301_i2c_hw_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:965:16: warning: no previous prototype for function 'dcn301_hubbub_create' [-Wmissing-prototypes]
   struct hubbub *dcn301_hubbub_create(struct dc_context *ctx)
                  ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:965:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct hubbub *dcn301_hubbub_create(struct dc_context *ctx)
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:996:26: warning: no previous prototype for function 'dcn301_timing_generator_create' [-Wmissing-prototypes]
   struct timing_generator *dcn301_timing_generator_create(
                            ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:996:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct timing_generator *dcn301_timing_generator_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1030:22: warning: no previous prototype for function 'dcn301_link_encoder_create' [-Wmissing-prototypes]
   struct link_encoder *dcn301_link_encoder_create(
                        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1030:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct link_encoder *dcn301_link_encoder_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1051:20: warning: no previous prototype for function 'dcn301_panel_cntl_create' [-Wmissing-prototypes]
   struct panel_cntl *dcn301_panel_cntl_create(const struct panel_cntl_init_data *init_data)
                      ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1051:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct panel_cntl *dcn301_panel_cntl_create(const struct panel_cntl_init_data *init_data)
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1133:24: warning: no previous prototype for function 'dcn301_stream_encoder_create' [-Wmissing-prototypes]
   struct stream_encoder *dcn301_stream_encoder_create(
                          ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1133:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct stream_encoder *dcn301_stream_encoder_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1165:19: warning: no previous prototype for function 'dcn301_hwseq_create' [-Wmissing-prototypes]
   struct dce_hwseq *dcn301_hwseq_create(
                     ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1165:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct dce_hwseq *dcn301_hwseq_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1319:14: warning: no previous prototype for function 'dcn301_hubp_create' [-Wmissing-prototypes]
   struct hubp *dcn301_hubp_create(
                ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1319:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   struct hubp *dcn301_hubp_create(
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1338:6: warning: no previous prototype for function 'dcn301_dwbc_create' [-Wmissing-prototypes]
   bool dcn301_dwbc_create(struct dc_context *ctx, struct resource_pool *pool)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1338:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   bool dcn301_dwbc_create(struct dc_context *ctx, struct resource_pool *pool)
   ^
   static 
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1363:6: warning: no previous prototype for function 'dcn301_mmhubbub_create' [-Wmissing-prototypes]
   bool dcn301_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool)
        ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1363:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   bool dcn301_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool)
   ^
   static 
   80 warnings generated.
..

vim +/vg_update_clocks +96 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c

3a83e4e64bb1522 Roman Li 2020-09-29   95  
3a83e4e64bb1522 Roman Li 2020-09-29  @96  void vg_update_clocks(struct clk_mgr *clk_mgr_base,
3a83e4e64bb1522 Roman Li 2020-09-29   97  			struct dc_state *context,
3a83e4e64bb1522 Roman Li 2020-09-29   98  			bool safe_to_lower)
3a83e4e64bb1522 Roman Li 2020-09-29   99  {
3a83e4e64bb1522 Roman Li 2020-09-29  100  	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
3a83e4e64bb1522 Roman Li 2020-09-29  101  	struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
3a83e4e64bb1522 Roman Li 2020-09-29  102  	struct dc *dc = clk_mgr_base->ctx->dc;
3a83e4e64bb1522 Roman Li 2020-09-29  103  	int display_count;
3a83e4e64bb1522 Roman Li 2020-09-29  104  	bool update_dppclk = false;
3a83e4e64bb1522 Roman Li 2020-09-29  105  	bool update_dispclk = false;
3a83e4e64bb1522 Roman Li 2020-09-29  106  	bool dpp_clock_lowered = false;
3a83e4e64bb1522 Roman Li 2020-09-29  107  
3a83e4e64bb1522 Roman Li 2020-09-29  108  	if (dc->work_arounds.skip_clock_update)
3a83e4e64bb1522 Roman Li 2020-09-29  109  		return;
3a83e4e64bb1522 Roman Li 2020-09-29  110  
3a83e4e64bb1522 Roman Li 2020-09-29  111  	/*
3a83e4e64bb1522 Roman Li 2020-09-29  112  	 * if it is safe to lower, but we are already in the lower state, we don't have to do anything
3a83e4e64bb1522 Roman Li 2020-09-29  113  	 * also if safe to lower is false, we just go in the higher state
3a83e4e64bb1522 Roman Li 2020-09-29  114  	 */
3a83e4e64bb1522 Roman Li 2020-09-29  115  	if (safe_to_lower) {
3a83e4e64bb1522 Roman Li 2020-09-29  116  		/* check that we're not already in lower */
3a83e4e64bb1522 Roman Li 2020-09-29  117  		if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_LOW_POWER) {
3a83e4e64bb1522 Roman Li 2020-09-29  118  
3a83e4e64bb1522 Roman Li 2020-09-29  119  			display_count = vg_get_active_display_cnt_wa(dc, context);
3a83e4e64bb1522 Roman Li 2020-09-29  120  			/* if we can go lower, go lower */
3a83e4e64bb1522 Roman Li 2020-09-29  121  			if (display_count == 0) {
3a83e4e64bb1522 Roman Li 2020-09-29  122  				union display_idle_optimization_u idle_info = { 0 };
3a83e4e64bb1522 Roman Li 2020-09-29  123  
3a83e4e64bb1522 Roman Li 2020-09-29  124  				idle_info.idle_info.df_request_disabled = 1;
3a83e4e64bb1522 Roman Li 2020-09-29  125  				idle_info.idle_info.phy_ref_clk_off = 1;
3a83e4e64bb1522 Roman Li 2020-09-29  126  
3a83e4e64bb1522 Roman Li 2020-09-29  127  				dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data);
3a83e4e64bb1522 Roman Li 2020-09-29  128  				/* update power state */
3a83e4e64bb1522 Roman Li 2020-09-29  129  				clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_LOW_POWER;
3a83e4e64bb1522 Roman Li 2020-09-29  130  			}
3a83e4e64bb1522 Roman Li 2020-09-29  131  		}
3a83e4e64bb1522 Roman Li 2020-09-29  132  	} else {
3a83e4e64bb1522 Roman Li 2020-09-29  133  		/* check that we're not already in D0 */
3a83e4e64bb1522 Roman Li 2020-09-29  134  		if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_MISSION_MODE) {
3a83e4e64bb1522 Roman Li 2020-09-29  135  			union display_idle_optimization_u idle_info = { 0 };
3a83e4e64bb1522 Roman Li 2020-09-29  136  
3a83e4e64bb1522 Roman Li 2020-09-29  137  			dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data);
3a83e4e64bb1522 Roman Li 2020-09-29  138  			/* update power state */
3a83e4e64bb1522 Roman Li 2020-09-29  139  			clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_MISSION_MODE;
3a83e4e64bb1522 Roman Li 2020-09-29  140  		}
3a83e4e64bb1522 Roman Li 2020-09-29  141  	}
3a83e4e64bb1522 Roman Li 2020-09-29  142  
3a83e4e64bb1522 Roman Li 2020-09-29  143  	if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {
3a83e4e64bb1522 Roman Li 2020-09-29  144  		clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
3a83e4e64bb1522 Roman Li 2020-09-29  145  		dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz);
3a83e4e64bb1522 Roman Li 2020-09-29  146  	}
3a83e4e64bb1522 Roman Li 2020-09-29  147  
3a83e4e64bb1522 Roman Li 2020-09-29  148  	if (should_set_clock(safe_to_lower,
3a83e4e64bb1522 Roman Li 2020-09-29  149  			new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) {
3a83e4e64bb1522 Roman Li 2020-09-29  150  		clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
3a83e4e64bb1522 Roman Li 2020-09-29  151  		dcn301_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz);
3a83e4e64bb1522 Roman Li 2020-09-29  152  	}
3a83e4e64bb1522 Roman Li 2020-09-29  153  
3a83e4e64bb1522 Roman Li 2020-09-29  154  	// workaround: Limit dppclk to 100Mhz to avoid lower eDP panel switch to plus 4K monitor underflow.
3a83e4e64bb1522 Roman Li 2020-09-29  155  	if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
3a83e4e64bb1522 Roman Li 2020-09-29  156  		if (new_clocks->dppclk_khz < 100000)
3a83e4e64bb1522 Roman Li 2020-09-29  157  			new_clocks->dppclk_khz = 100000;
3a83e4e64bb1522 Roman Li 2020-09-29  158  	}
3a83e4e64bb1522 Roman Li 2020-09-29  159  
3a83e4e64bb1522 Roman Li 2020-09-29  160  	if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) {
3a83e4e64bb1522 Roman Li 2020-09-29  161  		if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz)
3a83e4e64bb1522 Roman Li 2020-09-29  162  			dpp_clock_lowered = true;
3a83e4e64bb1522 Roman Li 2020-09-29  163  		clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz;
3a83e4e64bb1522 Roman Li 2020-09-29  164  		update_dppclk = true;
3a83e4e64bb1522 Roman Li 2020-09-29  165  	}
3a83e4e64bb1522 Roman Li 2020-09-29  166  
3a83e4e64bb1522 Roman Li 2020-09-29  167  	if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
3a83e4e64bb1522 Roman Li 2020-09-29  168  		clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
3a83e4e64bb1522 Roman Li 2020-09-29  169  		dcn301_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
3a83e4e64bb1522 Roman Li 2020-09-29  170  
3a83e4e64bb1522 Roman Li 2020-09-29  171  		update_dispclk = true;
3a83e4e64bb1522 Roman Li 2020-09-29  172  	}
3a83e4e64bb1522 Roman Li 2020-09-29  173  
3a83e4e64bb1522 Roman Li 2020-09-29  174  	if (dpp_clock_lowered) {
3a83e4e64bb1522 Roman Li 2020-09-29  175  		// increase per DPP DTO before lowering global dppclk
3a83e4e64bb1522 Roman Li 2020-09-29  176  		dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
3a83e4e64bb1522 Roman Li 2020-09-29  177  		dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
3a83e4e64bb1522 Roman Li 2020-09-29  178  	} else {
3a83e4e64bb1522 Roman Li 2020-09-29  179  		// increase global DPPCLK before lowering per DPP DTO
3a83e4e64bb1522 Roman Li 2020-09-29  180  		if (update_dppclk || update_dispclk)
3a83e4e64bb1522 Roman Li 2020-09-29  181  			dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
3a83e4e64bb1522 Roman Li 2020-09-29  182  		// always update dtos unless clock is lowered and not safe to lower
3a83e4e64bb1522 Roman Li 2020-09-29  183  		if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
3a83e4e64bb1522 Roman Li 2020-09-29  184  			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
3a83e4e64bb1522 Roman Li 2020-09-29  185  	}
3a83e4e64bb1522 Roman Li 2020-09-29  186  }
3a83e4e64bb1522 Roman Li 2020-09-29  187  

:::::: The code at line 96 was first introduced by commit
:::::: 3a83e4e64bb1522ddac67ffc787d1c38291e1a65 drm/amd/display: Add dcn3.01 support to DC (v2)

:::::: TO: Roman Li <Roman.Li@xxxxxxx>
:::::: CC: Alex Deucher <alexander.deucher@xxxxxxx>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

Attachment: .config.gz
Description: application/gzip


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