On Fri, Sep 25, 2020 at 12:50:34AM +0200, Andrey Konovalov wrote: > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > index 23c326a06b2d..12ba98bc3b3f 100644 > --- a/arch/arm64/mm/proc.S > +++ b/arch/arm64/mm/proc.S > @@ -427,6 +427,10 @@ SYM_FUNC_START(__cpu_setup) > */ > mov_q x5, MAIR_EL1_SET > #ifdef CONFIG_ARM64_MTE > + mte_tcr .req x20 > + > + mov mte_tcr, #0 > + > /* > * Update MAIR_EL1, GCR_EL1 and TFSR*_EL1 if MTE is supported > * (ID_AA64PFR1_EL1[11:8] > 1). > @@ -447,6 +451,9 @@ SYM_FUNC_START(__cpu_setup) > /* clear any pending tag check faults in TFSR*_EL1 */ > msr_s SYS_TFSR_EL1, xzr > msr_s SYS_TFSRE0_EL1, xzr > + > + /* set the TCR_EL1 bits */ > + orr mte_tcr, mte_tcr, #SYS_TCR_EL1_TCMA1 > 1: > #endif > msr mair_el1, x5 > @@ -457,6 +464,10 @@ SYM_FUNC_START(__cpu_setup) > mov_q x10, TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \ > TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ > TCR_TBI0 | TCR_A1 | TCR_KASAN_FLAGS > +#ifdef CONFIG_ARM64_MTE > + orr x10, x10, mte_tcr > + .unreq mte_tcr > +#endif > tcr_clear_errata_bits x10, x9, x5 I had a slightly different preference (see the previous version) to avoid the #ifdef altogether but this works as well. Reviewed-by: Catalin Marinas <catalin.marinas@xxxxxxx>
