On Wed, 6 Jul 2011, Arnd Bergmann wrote: > On Wednesday 06 July 2011 21:10:07 Nicolas Pitre wrote: > > If you get a highmem page, because the cache is VIPT, that page might > > still be cached even if it wasn't mapped. With a VIVT cache we must > > flush the cache whenever a highmem page is unmapped. There is no such > > restriction with VIPT i.e. ARMv6 and above. Therefore to make sure the > > highmem page you get doesn't have cache lines associated to it, you must > > first map it cacheable, then perform cache invalidation on it, and > > eventually remap it as non-cacheable. This is necessary because there > > is no way to perform cache maintenance on L1 cache using physical > > addresses unfortunately. See commit 7e5a69e83b for an example of what > > this entails (fortunately commit 3e4d3af501 made things much easier and > > therefore commit 39af22a79 greatly simplified things). > > Ok, thanks for the explanation. This definitely makes the highmem approach > much harder to get right, and slower. Let's hope then that Marek's approach > of using small pages for the contiguous memory region and changing their > attributes on the fly works out better than this. I would say that both approaches have fairly equivalent complexity. Nicolas -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/ Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>