On Wed, 24 Jun 2020 17:26:30 +0800 Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
> update_mmu_cache_pmd is used to update tlb for the pmd entry by
> software. On MIPS system, the tlb entry indexed by page fault
> address maybe exists already, only that tlb entry may be small
> page, also it may be huge page. Before updating pmd entry with
> huge page size, older tlb entry need to be invalidated.
>
> Here page fault address is passed to function update_mmu_cache_pmd,
> rather than pmd huge page start address. The page fault address
> can be used for invalidating older tlb entry.
>
> ...
>
> --- a/arch/mips/include/asm/pgtable.h
> +++ b/arch/mips/include/asm/pgtable.h
> @@ -554,11 +554,20 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
> #define __HAVE_ARCH_UPDATE_MMU_TLB
> #define update_mmu_tlb update_mmu_cache
>
> +extern void local_flush_tlb_page(struct vm_area_struct *vma,
> + unsigned long page);
This is unfortunate. We can't #include <asm/'tlbflush.h>?
> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
> unsigned long address, pmd_t *pmdp)
> {
> pte_t pte = *(pte_t *)pmdp;
>
> + /*
> + * If pmd_none is true, older tlb entry will be normal page.
> + * here to invalidate older tlb entry indexed by address
> + * parameter address must be page fault address rather than
> + * start address of pmd huge page
> + */
> + local_flush_tlb_page(vma, address);
> __update_tlb(vma, address, pte);
> }
>
