Re: [PATCH v6 1/4] MIPS: Do not flush tlb page when updating PTE entry

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On 25.05.2020 11:12, Sergei Shtylyov wrote:

It is not necessary to flush tlb page on all CPUs if suitable PTE
entry exists already during page fault handling, just updating
TLB is fine.

Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.

    Need empty line here.

V6:
- Add update_mmu_tlb function as empty on all platform except mips
   system, we use this function to update local tlb for page fault
   smp-race handling
V5:
- define update_mmu_cache function specified on MIPS platform, and
   add page fault smp-race stats info
V4:
- add pte_sw_mkyoung function to implement readable privilege, and
   this function is  only in effect on MIPS system.
- add page valid bit judgement in function pte_modify
V3:
- add detailed changelog, modify typo issue in patch V2
v2:
- split flush_tlb_fix_spurious_fault and tlb update into two patches
- comments typo modification
- separate tlb update and add pte readable privilege into two patches

   It was a bad idea to keep the version change log in the 1st patch only,
we have either cover letter for that, or all the individual patches...

Sorry for noticing this only now. With 4 patches, you should have a cover letter anyway...

Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
[...]

MBR, Sergei





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