On Thu, Apr 23, 2020 at 09:56:54PM +0800, Zhenyu Ye wrote:
> From: "Peter Zijlstra (Intel)" <peterz@xxxxxxxxxxxxx>
>
> tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and
> tlb->end, then set corresponding cleared_*.
>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
> Signed-off-by: Zhenyu Ye <yezhenyu2@xxxxxxxxxx>
Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx>
