On Fri, Apr 17, 2020 at 01:16:29PM +0100, Mel Gorman wrote: > On Fri, Apr 17, 2020 at 12:21:29PM +0200, SeongJae Park wrote: > > On Fri, 17 Apr 2020 12:04:17 +0200 Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote: > > > > > On Fri, Apr 17, 2020 at 09:05:08AM +0200, SeongJae Park wrote: > > > > I think the main idea of DAMON[1] might be able to applied here. Have you > > > > considered it? > > > > > > > > [1] https://lore.kernel.org/linux-mm/20200406130938.14066-1-sjpark@xxxxxxxxxx/ > > > > > > I've ignored that entire thing after you said the information it > > > provides was already available through the PMU. > > > > Sorry if my answer made you confused. What I wanted to say was that the > > fundamental access checking mechanism that DAMON depends on is PTE Accessed bit > > for now, but it could be modified to use PMU or other features instead. > > I would not be inclined to lean towards either approach for NUMA > balancing. Fiddling with the accessed bit can have consequences for page > aging and residency -- fine for debugging a problem, not to fine for > normal usage. I would expect the PMU approach would have high overhead > as well as taking over a PMU counter that userspace debugging may expect > to be available. Oh, quite agreed; I was just saying I never saw the use of that whole DAMON thing. AFAICT it's not actually solving a problem, just making more.
