On Thu, Feb 06, 2020 at 09:34:10AM -0800, Matthew Wilcox wrote: > On Thu, Feb 06, 2020 at 06:57:41PM +0200, Mike Rapoport wrote: > > While updating the architectures to properly use 5-level folded page tables > > without <asm-generic/?level-fixup.h> and <asm-generic/pgtable-nop4d-hack.h> > > I wondered if we can do better than explicitly name each and every level of > > the page table, open-code traversal of all the layers numerous times and > > have copied do_something_pXd_range(). > > > > Then I've come across Kirill's "Proof-of-concept: better(?) page-table > > manipulation API" [1], but as far as I could see there was no progress > > since then. > > > > I'd like to resurrect the topic and try to see if we can come up with > > actually better page table manipulation API. > > > > [1] https://lore.kernel.org/lkml/20180424154355.mfjgkf47kdp2by4e@xxxxxxxxxxxxxxxxxx/ I played a bit more with it after that, but got distracted to other stuff. I'll see if I'll be able to come up with an update. > I don't think this approach helps support 64k pages on ARM Could you specify what such support would require? > , for example, > so it doesn't solve enough problems to be worth doing. I'd favour > an interface which looked more like this: > > vpte_iter iter; > vpte_t vpte; > > vpte_iter_for_each(vpte, iter, start, end, flags) { > unsigned char order = vpte_order(&iter); > ... do things based on vpte and order ... > } It looks like just an higher level API that can be provided over my approach. Maybe it should be the default go-to. But I find it useful to be able go into low-level details where it is matters. -- Kirill A. Shutemov