On Mon, Dec 16, 2019 at 06:43:53PM +0530, Aneesh Kumar K.V wrote:
> On 12/16/19 6:07 PM, Peter Zijlstra wrote:
> > I'm confused, are you saing you're happy to have PowerPC eat the extra
> > TLB invalidates? I thought you cared about PPC performance :-)
> >
> >
>
> Instead can we do
>
> static inline void tlb_table_invalidate(struct mmu_gather *tlb)
> {
> #ifndef CONFIG_MMU_GATHER_RCU_TABLE_FREE
> * Invalidate page-table caches used by hardware walkers. Then we still
> * need to RCU-sched wait while freeing the pages because software
> * walkers can still be in-flight.
> */
> tlb_flush_mmu_tlbonly(tlb);
> #endif
> }
How does that not break ARM/ARM64/s390 and x86 ?
