On Sun, Aug 18, 2019 at 11:20:35AM +0300, Mike Rapoport wrote:
> On Sun, Aug 18, 2019 at 03:46:51PM +0800, Zhaoyang Huang wrote:
> > On Sun, Aug 18, 2019 at 2:32 AM Russell King - ARM Linux admin
> > <linux@xxxxxxxxxxxxxxx> wrote:
> > >
> > > On Sat, Aug 17, 2019 at 11:00:13AM +0800, Zhaoyang Huang wrote:
> > > > From: Zhaoyang Huang <zhaoyang.huang@xxxxxxxxxx>
> > > >
> > > > pfn_valid can be wrong while the MSB of physical address be trimed as pfn
> > > > larger than the max_pfn.
> > >
> > > What scenario are you addressing here? At a guess, you're addressing
> > > the non-LPAE case with PFNs that correspond with >= 4GiB of memory?
> > Please find bellowing for the callstack caused by this defect. The
> > original reason is a invalid PFN passed from userspace which will
> > introduce a invalid page within stable_page_flags and then kernel
> > panic.
Thanks.
> Yeah, arm64 hit this issue a while ago and it was fixed with commit
> 5ad356eabc47 ("arm64: mm: check for upper PAGE_SHIFT bits in pfn_valid()").
>
> IMHO, the check
>
> if ((addr >> PAGE_SHIFT) != pfn)
>
> is more robust than comparing pfn to max_pfn.
Yep, I'd prefer to see:
phys_addr_t addr = __pfn_to_phys(pfn);
if (__pfn_to_phys(addr) != pfn)
return 0;
return memblock_is_map_memory(addr);
--
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