On 28/07/2019 12:20, Anshuman Khandual wrote: > On 07/22/2019 09:11 PM, Steven Price wrote: >> Steven Price (21): >> arc: mm: Add p?d_leaf() definitions >> arm: mm: Add p?d_leaf() definitions >> arm64: mm: Add p?d_leaf() definitions >> mips: mm: Add p?d_leaf() definitions >> powerpc: mm: Add p?d_leaf() definitions >> riscv: mm: Add p?d_leaf() definitions >> s390: mm: Add p?d_leaf() definitions >> sparc: mm: Add p?d_leaf() definitions >> x86: mm: Add p?d_leaf() definitions > > The set of architectures here is neither complete (e.g ia64, parisc missing) > nor does it only include architectures which had previously enabled PTDUMP > like arm, arm64, powerpc, s390 and x86. Is there any reason for this set of > archs to be on the list and not the others which are currently falling back > on generic p?d_leaf() defined later in the series ? Are the missing archs > do not have huge page support in the MMU ? If there is a direct dependency > for these symbols with CONFIG_HUGETLB_PAGE then it must be checked before > falling back on the generic ones. The list of architectures here is what I believe to be the list of architectures which can have leaf entries further up the tree than normal. I'm by no means an expert on all these architectures so I'm hoping someone will chime in if they notice something amiss. Obviously all the NO_MMU ia64 as far as I can tell doesn't implement leaf entries further up - it has an interesting hybrid hardware/software walk mechanism and as I understand it the hardware never walks the page table tree that the p?d_xxx() operations operate on. So this is a software implementation detail - but the existance of p?d_huge functions which always return 0 were my first clue that leaf entries are only at the bottom of the tree. parisc is more interesting and I'm not sure if this is necessarily correct. I originally proposed a patch with the line "For parisc, we don't support large pages, so add stubs returning 0" which got Acked by Helge Deller. However going back to look at that again I see there was a follow up thread[2] which possibly suggests I was wrong? Can anyone shed some light on whether parisc does support leaf entries of the page table tree at a higher than the normal depth? [1] https://lkml.org/lkml/2019/2/27/572 [2] https://lkml.org/lkml/2019/3/5/610 The intention is that the page table walker would be available for all architectures so that it can be used in any generic code - PTDUMP simply seemed like a good place to start. > Now that pmd_leaf() and pud_leaf() are getting used in walk_page_range() these > functions need to be defined on all arch irrespective if they use PTDUMP or not > or otherwise just define it for archs which need them now for sure i.e x86 and > arm64 (which are moving to new generic PTDUMP framework). Other archs can > implement these later. The intention was to have valid definitions for all architectures, but obviously I need help from those familiar with those other architectures to check whether I've understood them correctly. Thanks, Steve
