On Mon, Mar 04, 2019 at 11:56:13AM +0000, Steven Price wrote: > On 01/03/2019 21:47, Kirill A. Shutemov wrote: > > On Wed, Feb 27, 2019 at 05:05:37PM +0000, Steven Price wrote: > >> walk_page_range() is going to be allowed to walk page tables other than > >> those of user space. For this it needs to know when it has reached a > >> 'leaf' entry in the page tables. This information will be provided by the > >> p?d_large() functions/macros. > >> > >> For arm, we already provide most p?d_large() macros. Add a stub for PUD > >> as we don't have huge pages at that level. > > > > We do not have PUD for 2- and 3-level paging. Macros from generic header > > should cover it, shouldn't it? > > > > I'm not sure of the reasoning behind this, but levels are folded in a > slightly strange way. arm/include/asm/pgtable.h defines > __ARCH_USE_5LEVEL_HACK which means: > > PGD has 2048 (2-level) or 4 (3-level) entries which are always > considered 'present' (pgd_present() returns 1 defined in > asm-generic/pgtables-nop4d-hack.h). > > P4D has 1 entry which is always present (see asm-generic/5level-fixup.h) > > PUD has 1 entry (see asm-generic/pgtable-nop4d-hack.h). This is always > present for 2-level, and present only if the first level of real page > table is present with a 3-level. > > PMD/PTE are as you might expect. > > So in terms of tables which are more than one entry you have PGD, > (optionally) PMD, PTE. But the levels which actually read the table > entries are PUD, PMD, PTE. > > This means that the corresponding p?d_large() macros are needed for > PUD/PMD as that is where the actual entries are read. The asm-generic > files provide the definitions for PGD/P4D. Makes sense. Only additional thing worth nothing that ARM in 2-level paging case folds PMD manually without help from generic headres. I'm partly responsible for the mess with folding. Sorry that you need to explain this to :P -- Kirill A. Shutemov
