On Thu, Dec 06, 2018 at 10:50:41PM +0000, Steve Capper wrote: > On arm64 there is optional support for a 52-bit virtual address space. > To exploit this one has to be running with a 64KB page size and be > running on hardware that supports this. > > For an arm64 kernel supporting a 48 bit VA with a 64KB page size, > some changes are needed to support a 52-bit userspace: > * TCR_EL1.T0SZ needs to be 12 instead of 16, > * TASK_SIZE needs to reflect the new size. > > This patch implements the above when the support for 52-bit VAs is > detected at early boot time. > > On arm64 userspace addresses translation is controlled by TTBR0_EL1. As > well as userspace, TTBR0_EL1 controls: > * The identity mapping, > * EFI runtime code. > > It is possible to run a kernel with an identity mapping that has a > larger VA size than userspace (and for this case __cpu_set_tcr_t0sz() > would set TCR_EL1.T0SZ as appropriate). However, when the conditions for > 52-bit userspace are met; it is possible to keep TCR_EL1.T0SZ fixed at > 12. Thus in this patch, the TCR_EL1.T0SZ size changing logic is > disabled. > > Signed-off-by: Steve Capper <steve.capper@xxxxxxx> Reviewed-by: Catalin Marinas <catalin.marinas@xxxxxxx>
