On Wed, 30 Mar 2011 09:54:01 +0800 Shaohua Li <shaohua.li@xxxxxxxxx> wrote:
> On Wed, 2011-03-30 at 09:41 +0800, Andrew Morton wrote:
> > On Wed, 30 Mar 2011 09:36:40 +0800 Shaohua Li <shaohua.li@xxxxxxxxx> wrote:
> >
> > > > how is it that this improves things?
> > > Hmm, it actually is:
> > > struct percpu_counter {
> > > spinlock_t lock;
> > > s64 count;
> > > #ifdef CONFIG_HOTPLUG_CPU
> > > struct list_head list; /* All percpu_counters are on a list */
> > > #endif
> > > s32 __percpu *counters;
> > > } __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))
> > > so lock and count are in one cache line.
> >
> > ____cacheline_aligned_in_smp would achieve that?
> ____cacheline_aligned_in_smp can't guarantee the cache alignment for
> multiple nodes, because the variable can be updated by multiple
> nodes/cpus.
Confused. If an object is aligned at a mulitple-of-128 address on one
node, it is aligned at a multiple-of-128 address when viewed from other
nodes, surely?
Even if the cache alignment to which you're referring is the internode
cache, can a 34-byte, L1-cache-aligned structure ever span multiple
internode cachelines?
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