On Sat, Nov 10, 2018 at 08:29:05PM +0800, Baoquan He wrote: > > diff --git a/Documentation/x86/x86_64/mm.txt b/Documentation/x86/x86_64/mm.txt > > index 702898633b00..75bff98928a8 100644 > > --- a/Documentation/x86/x86_64/mm.txt > > +++ b/Documentation/x86/x86_64/mm.txt > > @@ -34,23 +34,24 @@ __________________|____________|__________________|_________|___________________ > > ____________________________________________________________|___________________________________________________________ > > | | | | > > ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hypervisor > > - ffff880000000000 | -120 TB | ffffc7ffffffffff | 64 TB | direct mapping of all physical memory (page_offset_base) > > - ffffc80000000000 | -56 TB | ffffc8ffffffffff | 1 TB | ... unused hole > > + ffff880000000000 | -120 TB | ffff887fffffffff | 0.5 TB | LDT remap for PTI > > + ffff888000000000 | -119.5 TB | ffffc87fffffffff | 64 TB | direct mapping of all physical memory (page_offset_base) > > + ffffc88000000000 | -55.5 TB | ffffc8ffffffffff | 0.5 TB | ... unused hole > > Hi Kirill, > > Thanks for this fix. One small concern is whether we can put LDT > remap in other place, e.g shrink KASAN area and save one pgd size for > it, Just from Redhat's enterprise relase point of view, we don't > enable CONFIG_KASAN, and LDT is rarely used for server, now cutting one > block from the direct mapping area and moving it up one pgd slot seems a > little too abrupt. Does KASAN really cost 16 TB in 4-level and 8 PB in > 5-level? After all the direct mapping is the core mapping and has been > there always, LDT remap is kind of not so core and important mapping. > Just a very perceptual feeling. Sorry for late reply. KASAN requires one byte of shadow memory per 8 bytes of target memory, so, yeah, we need 16 TiB of virtual address space with 4-level paging. With 5-level, we might save some address space as the limit for physical address space if 52-bit, not 55. I dedicated 55-bit address space because it was easier: just scale 4-level layout by factor of 9 and you'll get all nicely aligned without much thought (PGD translates to PGD, etc). There is also complication with KASAN layout. We have to have the same KASAN_SHADOW_OFFSET between 4- and 5-level paging to make boot time switching between paging modes work. The offset cannot be changed at runtime: it used as parameter to compiler. That's the reason KASAN area alignment looks strange. A possibly better solution would be to actually include LDT in KASLR: randomize the area along with direct mapping, vmalloc and vmemmap. But it's more complexity than I found reasonable for a fix. Do you want to try this? :) -- Kirill A. Shutemov
