On 11/20/2018 04:36 AM, Keith Busch wrote: > On Mon, Nov 19, 2018 at 09:44:00AM +0530, Anshuman Khandual wrote: >> On 11/15/2018 04:19 AM, Keith Busch wrote: >>> System memory may have side caches to help improve access speed. While >>> the system provided cache is transparent to the software accessing >>> these memory ranges, applications can optimize their own access based >>> on cache attributes. >> >> Cache is not a separate memory attribute. It impacts how the real attributes >> like bandwidth, latency e.g which are already captured in the previous patch. >> What is the purpose of adding this as a separate attribute ? Can you explain >> how this is going to help the user space apart from the hints it has already >> received with bandwidth, latency etc properties. > > I am not sure I understand the question here. Access bandwidth and latency > are entirely attributes different than what this patch provides. If the > system side-caches memory, the associativity, line size, and total size > can optionally be used by software to improve performance. Okay but then does this belong to this series which about memory attributes ?
