Re: [PATCH] slub: Disable the lockless allocator

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On Mon, 28 Mar 2011, Ingo Molnar wrote:

> I think we might still be missing the hunk below - or is it now not needed
> anymore?

Its not needed anymore.

>
> Thanks,
>
> 	Ingo
>
> -------------->
> >From 53c0eceb7bf64f2a89c59ae4f14a676fa4128462 Mon Sep 17 00:00:00 2001
> From: Christoph Lameter <cl@xxxxxxxxx>
> Date: Sat, 26 Mar 2011 14:49:56 -0500
> Subject: [PATCH] per_cpu: Fix cmpxchg_double() for !SMP
>
> cmpxchg_double() should only be provided for SMP. In the UP case
> the GS register is not defined and the function will fail.
>
> Signed-off-by: Christoph Lameter <cl@xxxxxxxxx>
> Cc: Pekka Enberg <penberg@xxxxxxxxxx>
> Cc: torvalds@xxxxxxxxxxxxxxxxxxxx
> Cc: tj@xxxxxxxxxx
> Cc: npiggin@xxxxxxxxx
> Cc: rientjes@xxxxxxxxxx
> Cc: linux-mm@xxxxxxxxx
> Cc: Eric Dumazet <eric.dumazet@xxxxxxxxx>
> LKML-Reference: <alpine.DEB.2.00.1103261440160.25375@xxxxxxxxxxx>
> Signed-off-by: Ingo Molnar <mingo@xxxxxxx>
> ---
>  arch/x86/include/asm/percpu.h |    2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
> index a09e1f0..52330a4 100644
> --- a/arch/x86/include/asm/percpu.h
> +++ b/arch/x86/include/asm/percpu.h
> @@ -507,6 +507,7 @@ do {									\
>   * it in software.  The address used in the cmpxchg16 instruction must be
>   * aligned to a 16 byte boundary.
>   */
> +#ifdef CONFIG_SMP
>  #define percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)			\
>  ({									\
>  	char __ret;							\
> @@ -529,6 +530,7 @@ do {									\
>  #define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2)	percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)
>
>  #endif
> +#endif
>
>  /* This is not atomic against other CPUs -- CPU preemption needs to be off */
>  #define x86_test_and_clear_bit_percpu(bit, var)				\
>

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