On Thu, Nov 08, 2018 at 09:23:35PM +0100, Florian Weimer wrote:
> * Ram Pai:
>
> > Florian,
> >
> > I can. But I am struggling to understand the requirement. Why is
> > this needed? Are we proposing a enhancement to the sys_pkey_alloc(),
> > to be able to allocate keys that are initialied to disable-read
> > only?
>
> Yes, I think that would be a natural consequence.
>
> However, my immediate need comes from the fact that the AMR register can
> contain a flag combination that is not possible to represent with the
> existing PKEY_DISABLE_WRITE and PKEY_DISABLE_ACCESS flags. User code
> could write to AMR directly, so I cannot rule out that certain flag
> combinations exist there.
>
> So I came up with this:
>
> int
> pkey_get (int key)
> {
> if (key < 0 || key > PKEY_MAX)
> {
> __set_errno (EINVAL);
> return -1;
> }
> unsigned int index = pkey_index (key);
> unsigned long int amr = pkey_read ();
> unsigned int bits = (amr >> index) & 3;
>
> /* Translate from AMR values. PKEY_AMR_READ standing alone is not
> currently representable. */
> if (bits & PKEY_AMR_READ)
this should be
if (bits & (PKEY_AMR_READ|PKEY_AMR_WRITE))
> return PKEY_DISABLE_ACCESS;
> else if (bits == PKEY_AMR_WRITE)
> return PKEY_DISABLE_WRITE;
> return 0;
> }
>
> And this is not ideal. I would prefer something like this instead:
>
> switch (bits)
> {
> case PKEY_AMR_READ | PKEY_AMR_WRITE:
> return PKEY_DISABLE_ACCESS;
> case PKEY_AMR_READ:
> return PKEY_DISABLE_READ;
> case PKEY_AMR_WRITE:
> return PKEY_DISABLE_WRITE;
> case 0:
> return 0;
> }
yes.
and on x86 it will be something like:
switch (bits)
{
case PKEY_PKRU_ACCESS :
return PKEY_DISABLE_ACCESS;
case PKEY_AMR_WRITE:
return PKEY_DISABLE_WRITE;
case 0:
return 0;
}
But for this to work, why do you need to enhance the sys_pkey_alloc()
interface? Not that I am against it. Trying to understand if the
enhancement is really needed.
>
> By the way, is the AMR register 64-bit or 32-bit on 32-bit POWER?
It is 64-bit.
RP
