Re: mmotm 2018-08-23-17-26 uploaded

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On Thu, Aug 30, 2018 at 02:26:51PM +0800, Jia He wrote:
> On 8/30/2018 9:00 AM, Jia He Wrote:
> > On 8/30/2018 7:22 AM, Andrew Morton Wrote:
> >> On Tue, 28 Aug 2018 12:20:46 +0800 Jia He <hejianet@xxxxxxxxx> wrote:
> >>> FYI,I watched a lockdep warning based on your mmotm master branch[1]
> >>
> >> Thanks.  We'll need help from ARM peeps on this please.
> >>
> >>> [    6.692731] ------------[ cut here ]------------
> >>> [    6.696391] DEBUG_LOCKS_WARN_ON(!current->hardirqs_enabled)

[...]

> >>> I thought the root cause might be at [2] which seems not in your branch yet.
> >>>
> >>> [1] http://git.cmpxchg.org/cgit.cgi/linux-mmotm.git
> >>> [2]
> >>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=efd112
> >>
> >> I agree, that doesn't look like the culprit.  But something may well
> >> have gone wrong in "the recent conversion of the syscall entry/exit
> >> code to C".
> > Sorry for my unclearly previously description.
> > 1. no such lockdep warning in latest mainline kernel git tree.
> > 2. there is a 100% producible warning based on your latest mmotm tree
> > 3. after applying the commit efd112 based on your mmotm tree, the warning
> > disappearred
> > 
> > I will do some further digging to answer your question if no other experts' help
> > 
> 1. in el0_svc->el0_svc_common, without commit efd112
> 		local_daif_mask();   //disable the irq and trace irq off
> 		flags = current_thread_info()->flags;
> 		if (!has_syscall_work(flags))
> 			------------    //1
> 			return;
> If el0_svc_common enters the logic at line 1, the irq is disabled and
> current->hardirqs_enabled is 0.
> 
> 2. then it goes to el0_da
> in el0_da, it enables the irq without changing current->hardirqs_enabled to 1
> 
> 3. goes to el0_da->do_mem_abort->... the lockdep warning happens
> 
> The commit efd112 fixes it by invoking trace_hardirqs_off at line 1.
> It closes the inconsistency window.

Right, we fixed this last month in commit efd112353bf7 ("arm64: svc: Ensure
hardirq tracing is updated before return"). Is there anything more you need
from us on the Arm side?

Will




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