On Tue, May 22, 2018 at 10:03:54AM -0700, Dave Hansen wrote: > On 05/22/2018 09:46 AM, Christopher Lameter wrote: > > On Tue, 22 May 2018, Dave Hansen wrote: > > > >> On 05/22/2018 09:05 AM, Boaz Harrosh wrote: > >>> How can we implement "Private memory"? > >> Per-cpu page tables would do it. > > We already have that for percpu subsystem. See alloc_percpu() > > I actually mean a set of page tables which is only ever installed on a > single CPU. The CPU is architecturally allowed to go load any PTE in > the page tables into the TLB any time it feels like. The only way to > keep a PTE from getting into the TLB is not ensure that a CPU never has > any access to it, and the only way to do that is to make sure that no > set of page tables it ever loads into CR3 have that PTE. > > As Peter said, it's possible, but not pretty. But CR3 is a per-CPU register. So it'd be *possible* to allocate one PGD per CPU (per process). Have them be identical in all but one of the PUD entries. Then you've reserved 1/512 of your address space for per-CPU pages. Complicated, ugly, memory-consuming. But possible.
